IIEST, Shibpur

Indian Institute of Engineering Science and Technology, Shibpur

(Formerly Bengal Engineering and Science University, Shibpur)

Empowering the nation since 1856

Ayan Benerjee
etc-ayan banerjee Ayan Benerjee
Associate Professor ,  Electronics & Tele Communications

  • PhD: Thesis submitted to the Indian Institute of Technology, Kharagpur in 2013.
  • M.Tech: 1999 in Electronics and Electrical Communication Engineering with specialization in Integrated Circuits and Systems Engineering from IIT Kharagpur
  • B.E.: 1994 in Electronics and Telecommunication Engineering from Bengal Engineering College, Shibpur, Calcutta University

 

Contact Addresses
Residence Super's Qtr. Sen Hall,
BESU Campus, West Bengal, India
Phone (office) +91 - 33 - 26684561/62/63 Ext. 489
Mobile +91 -
email ayan@telecom.becs.ac.in.

 

Research Areas
  • VLSI Architectures for Communication and Biomedical Engineering
  • CORDIC based DSP architectures

 

Recent Publications

Up to March, 2014

Book/Book Chapter/Monograph: (Total Number =1)

    • Neil Weste, David Harris and Ayan Banerjee "CMOS VLSI Design, A Circuits and Systems perspective", Pearson Education India, Third Edition 2006.

Peer-Reviewed Archival Journals (Total Number=3)

    • Ayan Banerjee and Anindya Sundar Dhar “Pipelined VLSI Architecture Using CORDIC for Transform Domain Equalizer” Journal of Signal Processing Systems, Springer, Vol.70, No.1, pp. 39-48, January 2013.
    • Ayan Banerjee and Anindya Sundar Dhar, “Novel Architecture for QAM Modulator - Demodulator and its Generalization to Multicarrier Modulation”, Microprocessors and Microsystems , Elsevier, Vol. 29, Issue 7, pp. 351-357, September 2005.
    • Ayan Banerjee, Anindya Sundar Dhar and Swapna Banerjee, “FPGA realization of CORDIC based FFT Processor for Biomedical Signal Processing”, Microprocessors and Microsystems, Elsevier, Vol. 25, Issue 3, pp. 131-142, May, 2001

Conference Proceedings: (Total Number =3)

    • Ayan Banerjee and Anindya Sundar Dhar, “High Throughput VLSI Architecture for CORDIC Based Pipelined FFT Processor” in Proc. International Joint Conference on Information and Communication Technology,2010 at Bhubaneswar, India, 9-10th January 2010.
    • S.P.Maity, P.K.Nandi, Ayan Banerjee and Malay K. Kundu, “Low Cost Data Authentication Scheme And Hardware Design”, Eleventh National Conference on Communication NCC-2005, Published,574-578, 2005.
    • S.P.Maity, Ayan Banerjee and Malay K. Kundu, “An Image-in-image communication scheme and VLSI implementation using FPGA”, IEEE India Annual Conference 2004, Presented and published, 6-11, 2004.


Courses Undertaken

 


Department of Electronics & Tele Communications , BESU, Shibpur - 7111 03, INDIA