Biplab K. Sikdar

1 Jayanta Paul, Rajat S Bhowmick, Riom Sen, Dwaipayan Ray, Suman S Manjhi, Soumya Sen, Biplab K Sikdar, Evaluation of Face Recognition Schemes for Low-computation IoT System Design, 1-6, 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

2 Nilanjana Das, Joy Halder, Baisakhi Das, Biplab K Sikdar, Exploring Hard to Detect Sequential Hardware Trojans, 1-6, 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

3 Baisakhi Das, Nilanjana Das, Biplab K Sikdar, Effect of Trojans on Write Data Access in Memory, 1-5, 2019 9th International Symposium on Embedded Computing and System Design (ISED), 2019

4 Avishek Choudhury, Brototi Mondal, Biplab K Sikdar, Latency Aware Fault Tolerant Cache in Multicore Using Dynamic Remapping Clusters, 2019 IEEE 28th Asian Test Symposium (ATS), 2019

5 Avishek Choudhury, Biplab K Sikdar, Soft Error Resilience in Chip Multiprocessor Cache using a Markov Model Based Re-usability Predictor, 468-476, 2019 IEEE 37th International Conference on Computer Design (ICCD), 2019

6 A Choudhury, BK Sikdar, CORE-VR: A Coherence and Reusability Aware Low Voltage Fault Tolerant Cache in Multicore, 1-4, 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2019

7 Manisha Ghosh, Rajeev Kumar, Mousumi Saha and Biplab K Sikdar, Cellular Automata and Its Applications, 52-56, IEEE International Conference on Automatic Control and Intelligent Systems, 2018

8 Avishek Choudhury, Brototi Mondal and Biplab K Sikdar, ReMiT: Redundancy Migration for Latency Aware Fault Tolerant Cache Design in Multicore, 80-84, 8th IEEE International Symposium on Embedded Computing and System Design (ISED), 2018

9 Nilanjana Das, Mousumi Saha and Biplab K Sikdar, Hard to Detect Combinational Hardware Trojans, 194-198, 8th IEEE International Symposium on Embedded Computing and System Design (ISED), 2018

10 Baisakhi Das, Nilanjana Das and Biplab K Sikdar, Stuck-At 0/1 Trojans on Return Address Stack, 210-214, 8th IEEE International Symposium on Embedded Computing and System Design (ISED), 2018

11 B Das, M Dalui, A Mondal, S Mandi, N Das, Biplab K Sikdar, Evaluation of Misspeculation Impact on Chip-Multiprocessors Power Overhead, 129-133, 7th ACM International Conference on Software and and Computer Applications, 2018

12 Avishek Choudhury, Biplab K Sikdar, Modeling & Analysis of Redundancy based Fault Tolerance for Permanent Faults in Chip Multiprocessor Cache, 115-120, IEEE 31st International Conference on VLSI Design & 17th International Conference on Embedded Systems, 2018

13 Avishek Choudhury, Biplab K Sikdar, CIFR: A Complete In-Place Fault Remapping strategy for CMP Cache using Dynamic Reuse Distance, 1-5, International Symposium on Embedded Computing and System Design (ISED), 2017

14 Mousumi Saha, Baisakhi Das and Biplab K Sikdar, Periodic Boundary Cellular Automata Based Test Structure For Memory, IEEE East West Design and Test Symposium, 2017

15 Sutapa Sarkar, Mousumi Saha and Biplab K Sikdar, Multi-Bit Fault Tolerant Design For Resistive Memories Through Dynamic Partitioning, IEEE East West Design and Test Symposium, 2017

16 Avishek Choudhury, Biplab K Sikdar, Performance Analysis of Disability based Fault Tolerance Techniques for Permanent Faults in Chip Multiprocessors, 217224, 21st VLSI Design and Test Symposium (VDAT), 2017

17 Bidesh Chakraborty, Mamata Dalui and Biplab K Sikdar, Design of Coherence Verification Unit for Heterogeneous CMPs Integrating Update and Invalidate Protocols, 115-120, 30th International Conference on VLSI Design & 16th International Conference on Embedded Systems, 2017

18 Bidesh Chakraborty, Mamata Dalui and Biplab K Sikdar, Design of coherence verification unit for CMPs realizing dragon protocol, 1-6, 20th VLSI Design and Test Symposium (VDAT), 2016

19 Mousumi Saha, Sutapa Sarkar Chatterjee and Biplab K Sikdar, Cellular Automata Based Fault Tolerant Resistive Memory Design, 176-180, 6th International Symposium on Embedded Computing and System Design (ISED), 2016

20 Baisakhi Das, Supreeti Kamilya and Biplab K Sikdar, Design of CA Based Scheme for Evenhanded Data Migration in CMPs, 117-121, 6th International Symposium on Embedded Computing and System Design (ISED), 2016

21 Bidesh Chakraborty, Mamata Dalui and Biplab K Sikdar, CA Based Protocol Processor for Heterogeneous CMPs, 254-258, 6th International Symposium on Embedded Computing and System Design (ISED), 2016

22 Mamata Dalui, Tannishtha Som, Shivani Bansal, Shivam Pant and Biplab K Sikdar, MASI: An Eviction Aware Cache Coherence Protocol for CMPs,, 249-253, 6th International Symposium on Embedded Computing and System Design (ISED), 2016

23 Mrinal Goswami, Bibhash Sen and Biplab K Sikdar, Design of low power 5-input majority voter in Quantum-dot Cellular Automata with effective error resilience, 101-105, 6th International Symposium on Embedded Computing and System Design (ISED), 2016

24 B Sen, R. mukherjee, Y Sahu, R. K Nath and Biplab K Sikdar, Towards designing reliable universal QCA logic in the presence of cell deposition defect, 575-576, 29th Inernational conference of VLSI design, 2016

25 Bidesh Chakraborty,  Bhanu Pratap Singh, M. Chinnapureddy, Mamata Dalui,  Biplab K Sikdar, Design of Coherence Verification Unit for Heterogeneous CMPs, 19th International Symposium on VLSI Design and Test (VDAT), 2015

26 Mausumi Saha, Shubhra and Biplab K Sikdar, An efficient method for testing of L1 cache module in tiled CMPs architecture at low cos, VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), 2015

27 Mausumi Saha, Navneet Kumar Gautam and Biplab K Sikdar, A fault tolerant test hardware for L1 cache module in tile CMPs architecture, 26-29, 19th International Symposium on VLSI Design and Test (VDAT), 2015

28 Mausumi Saha and Biplab K Sikdar, A Cellular Automata Based Fault Tolerant Approach in Designing Test Hardware for L1 Cache Module, 497-502, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2015

29 Rajdeep Kumar Nath, Bibhash Sen, Rachit Daga, Nilesh Chakraborty, Harsh Tibrewal, Biplab K Sikdar, Fault masking in Quantum-dot cellular automata using prohibitive logic circuit, 1-5, 19th International Symposium on VLSI Design and Test (VDAT), 2015

30 Baisakhi Das, Mousimi Saha, Sukanta Das and Biplab K Sikdar, A CA Based Scheme Of Cache Zone Prediction for Data Migration In CMPs, Annual IEEE India Conference (INDICON 2014), 2014

31 Bibhash Sen, Aman Agarwal, Rajdeep K Nath, Rijoy Mukherjee and Biplab K Sikdar, Efficient design of fault tolerant tiles in QC, 1-6, Annual IEEE India Conference (INDICON 2014), 2014

32 Mamata Dalui and Biplab K Sikdar, CA Based Scalable Protocol Processor for Chip Multiprocessors, 161-165, 5th International Symposium on Electronic System Design (ISED), 2014

33 Bibhash Sen, Rijoy Mukherjee, Rajdeep Kumar Nath and Biplab K Sikdar, Design of Fault Tolerant Universal Logic in QCA, 1-6, 5th International Symposium on Electronic System Design (ISED), 2014

34 Bibhash Sen, Manojit Dutta, Rijoy Mukherjee and Biplab K Sikdar, Design of Fault Tolerant Quantum-Dot Cellular Automata Logic Primitives, 22-26, 40th Int'l Micro and Nano Engineering Conference, Lausanne, 2014

35 Bibhash Sen, Anirban Nag, Asmit De and Biplab K Sikdar, Multilayer Design of QCA Multiplexer, 1-6, INDICON, 2013

36 Baisakhi Das, Nirmalya Sundar Maiti, Sukanta Das and Biplab K Sikdar, An Efficient Scheme For Data Block Migration In Tiled CMPs Cache System, INDICON, 2013

37 Baisakhi Das, Nirmalya Sundar Maiti, Sukanta Das Mousimi Saha and Biplab K Sikdar, Design of an Efficient Scheme for Data Migration in Chip Multiprocessors, 4th International Symposium on Electronic System Design (ISED), 2013

38 Bibhash Sen, Mrinal Goswami, Samik Some and Biplab K Sikdar, Design of Sequential Circuits in Multilayer QCA Structure, 21-25, 4th International Symposium on Electronic System Design (ISED), 2013

39 Mousumi Saha and Biplab K Sikdar, A Self Testable Hardware For Memory, 45-50, IEEE International Conference on Circuits and Systems: "Advanced Circuits and Systems for Sustainability" (ICCAS), 2013

40 Mousumi Saha and Biplab K Sikdar, A Cellular Automata Based Design of Self Testable Hardware For March C?, 333-338, International Conference on High Performance Computing and Simulation, 2013

41 Mamata Dalui and Biplab K Sikdar, Design of Directory Based Cache Coherence Protocol Verification Logic in CMPs around TACA, 318-325, International Conference on High Performance Computing and Simulation, 2013

42 Mamata Dalui, Keshav Gupta, and Biplab K Sikdar, Directory based cache coherence verification logic in cmps cache system, 33-40, ACM International Workshop on Many-core Embedded System (MES 2013), 2013

43 Mamata Dalui and Biplab K Sikdar, A Protocol Independent Test Design for Quick Determination of Incoherency in CMPs' Cache, 420-426, IEEE 2013 4th International Conference on Intelligent Systems, Modelling and Simulation, 2013

44 Bibhash Sen, Manojit Dutta, Debajyoty Banik, Dipak K Singh and Biplab K Sikdar, Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA, 241-245, IEEE International Symposium on Electronic System Design (ISED), 2012

45 Mousumi Saha, Souvik Das and Biplab K Sikdar, High Speed Hardware For March C?, 145-147, IEEE International Symposium on Electronic System Design (ISED), 2012

46 Mamata Dalui and Biplab K Sikdar, A Test Design for Quick Determination of Incoherency in Chip Multiprocessors’ Cache Realizing MOESI Protocol, 216-220, IEEE International Symposium on Electronic System Design (ISED), 2012

47 Mamata Dalui and Biplab K Sikdar, An Efficient Test Design for CMPs Cache Coherence, 718-722, ICDCS, 2012

48 Mousumi Saha and Biplab K Sikdar, A Cellular Automata Based High Speed Test Hardware For Word-Organized Memories, 345-349, IEEE International Conference on Devices, Circuits and Systems (ICDCS), 2012

49 Mousumi Saha and Biplab K Sikdar, CA Based Implementation of March Test For High Speed Memories, 54-58, IEEE International Conference on Circuits and Systems (ICCAS, 2012

50 Baisakhi Das, Bibhash Sen, Divyam Saran and Biplab K Sikdar, Identification of Power Hungry Unit In a Processor With Faulty Predictor, IEEE International Conference on Circuits and Systems (ICCAS), 2012

51 Baisakhi Das, Mousumi Saha and Biplab K Sikdar, Evaluation of Branch Predictors Targeting Easeful Diagnosis of Design Inaccuracies, 230-234, IEEE International Conference on Devices, Circuits and Systems (ICDCS), 2012

52 Bibhash Sen, Manojit Dutta, Dipak K Singh, Divyam Saran and Biplab K Sikdar, QCA Multiplexer based Design of Reversible ALU, 168-173, IEEE ICCAS, 2012

53 Bibhash Sen, Jyotirmoy Das, Biplab K Sikdar, A DFT Methodology Targeting On-line Testing Of Reversible Circuit, 689 – 693, International Conference on Devices, Circuits and Systems (ICDCS), 2012

54 Mamata Dalui, Biplab K Sikdar, An Efficient Test Design for Verification of Cache Coherence in CMPs, 328-334, IEEE 9th International Conference on Dependable, Autonomic and Secure Computing (DASC), 2011

55 Baisakhi Das, Gunjan Bhattacharya, Ilora Maity, Mamata Dalui, and Biplab K Sikdar, Impact of Inaccurate Design of Branch Predictors on Processors' Power Consumption, 335-342, IEEE 9th International Conference on Dependable, Autonomic and Secure Computing (DASC), 2011

56 Bibhash Sen, Mousumi Saha, Divyam Saran, Biplab K Sikdar, Synthesis of Reversible Universal Logic Around QCA With Online Testability, International Symposium on Electronic System Design (ISED), 2011

57 Gunjan Bhattacharya, Ilora Maity, Baisakhi Das and Biplab K Sikdar, Exploring Impact of Faults on Branch Predictors' Power for Diagnosis of Faulty Module, 226-231, IEEE Asian Test Symposium (ATS), 2011

58 Bibhash Sen, Tanumoy Adak, Anshu S Anand and Biplab K Sikdar, Synthesis of Reversible Universal QCA Gate Structure for Energy Efficient Digital Design, 806-810, IEEE Region 10 conference (TENCON), 2011

59 Bibhash Sen, Anshu S Anand and Biplab K Sikdar, Efficient Design Of Memory Based On Quantum-Dot Cellular Automata, 768-772, IEEE Region 10 conference (TENCON), 2011

60 Ilora Maity, Gunjan Bhattacharya, Sukanta Das, Biplab K Sikdar, A cellular automata based scheme for diagnosis of faulty nodes in WSN, 1212 – 1217, IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2011

61 Bibhash Sen, Anshu S Anand, Tanumoy Adak and Biplab K Sikdar, Thresholding using Quantum-dot Cellular Automata, 356–360, International Conference on Innovations in Information Technology (IEEE IIT), 2011

62 hiladitya Munshi, S Das, and Biplab K Sikdar, Characterization of Single Hybridization in Non-Interesting class of Cellular Automata For SMACA Synthesis, AUTOMATA, 2010

63 Bibhash Sen, Anik Sengupta, Mamata Dalui and Biplab K Sikdar, Design of testable universal logic gate targeting minimum wire-crossings in QCA logic circuit, 613-620, 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 2010

64 Mamata Dalui, Bibhash Sen and Biplab K Sikdar, Fault Tolerant QCA Logic Design with Coupled Majority-Minority Gate, IEEE VDAT, 2010

65 Bibhash Sen, Anik Sengupta, Mamata Dalui and Biplab K Sikdar, Design of universal logic gate targeting minimum wire-crossings in QCA logic circuit, 1181-1184, Midwest Symposium on Circuits and Systems, (IEEE MWSCAS), 2010

66 Indrajit Banerjee, Sukanta Das , Mamata Dalui, Hafizur Rahaman and Biplab K Sikdar, SSMCA: CA based Segmented Sensor Network Management Scheme, 177-184, IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2010

67 Mamata Dalui and Biplab K Sikdar, CA Based Quick Consensus in Distributed System Through Network Partitioning, 684-691, IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2010

68 Nirmalya S Maiti, Soumyabrata Ghosh, Biplab K Shikdar and P Pal Chaudhuri, Programmable cellular automata (PCA) based advanced encryption standard (AES) hardware architecture, 271-274, ACRI, 2010

69 Debashis Moitra, Sumanta Baulm, Somya Bhattacherjee, Pushan Mitra and Biplab K Sikdar, Cost optimal design of 3D steel building frames under wind and seismic loading using CA-LFSR, ICSE, 2010

70 Bibhash Sen, Manoj Mohapatra, Mamata Dalui and Biplab K Sikdar, Introducing Universal QCA Logic Gate For Synthesizing Symmetric Functions With Minimum Wire-Crossings, 828-833, acm ICWET conference, 2010

71 Sukanta Das, Meghnath Saha and Biplab K Sikdar, Cellular Automata Model For Traffic In Crowded Cities, International Conference on Traffic and Granular Flow 2009 (TFG09), 2009

72 Sutapa Ditti, Kalyan Mahata, Pushan Mitra and Biplab K Sikdar, Defect Characterization in Coupled Majority-Minority QCA Gate, 293-298, IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2009

73 Sukanta Das, Nazma Naskar, Sukanya Mukherjee, Biplab K Sikdar, CA Rules Identification for Efficient Design of Pattern Classifier, 336-341, International Conference on Scientific Computing (CSC'09), 2009

74 Mamata Dalui, Bidesh Chakraborty and Biplab K Sikdar, Quick Consensus Through Early Disposal of Faulty Processes, 1989-1994, IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2009

75 Sukanta Das, Meghnath Saha and Biplab K Sikdar, A Cellular Automata Based Model for Traffic in Congested City, 2397-2402, IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2009

76 Sukanta Das and Biplab K Sikdar, CA Based Built-In Self-Test Structure For SoC, 3-8, IEEE Asian Test Symposium, 2009

77 Sukanta Das, Sukanya Mukherjee, Nazma Naskar and Biplab K Sikdar, Modeling Single Length Cycle Nonlinear Cellular Automata For Pattern Recognition, 198-203, World Congress on Nature and Biologically Inspired Computing (NaBIC'09), IEEE, 2009

78 Debasish Moitra, Prosenjit Das, Pushan Mitra and Biplab K Sikdar, Cost Optimal Design of 3-D Steel Building Frames Using CA-LFSR, 788-793, World Congress on Nature and Biologically Inspired Computing (NaBIC'09), IEEE, 2009

79 I Banerjee, H Rahaman and Biplab K Sikdar, UDDN: Unidirectional Data Dissemination via Negotiation, IEEE International Conference on Information Networking, 2008

80 Sutapa Ditti, Susmit Maity and Biplab K Sikdar, Defect Tolerance of QCA Nand-Nor-Inverter Network, VDAT, 2008

81 Sutapa Ditti, P K Bhattacharya, Pushan Mitra and Biplab K Sikdar, Logic realization with coupled QCA majority-minority gate, VDAT, 2008

82 Susmit Maity, Pushan Mitra, Prasenjit Ghosh and Biplab K Sikdar, Cellular automata and LFSR coupling for pattern generation: a feasibility study, VDAT, 2008

83 Hafizur Rahaman, Jimson Mathew, Biplab K Sikdar and Dhiraj K Pradhan, Transition fault testability in bit parallel multipliers over GF(2m), 422-430, IEEE VLSI Test Symposium, 2007

84 B Sen and Biplab K Sikdar, Characterization of universal nand-nor-inverter, VDAT, 2007

85 B Sen and Biplab K Sikdar, A study on defect tolerance of tiles implementing universal gate functions, 13-18, IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2007

86 B Sen and Biplab K Sikdar, A study on defect tolerance of tiles implementing universal gate functions, 13-18, IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2007

87 D Moitra, S Dhar, J M Mallick and Biplab K Sikdar, Cellular automata model for cost optimal design of steel building frames, 1440-1455, IICAI, 2007

88 Sukanta Das, Hafizur Rahaman and Biplab K Sikdar, Cost Optimal Design of Nonlinear CA Based PRPG for Test Applications, 284-287, IEEE 14th Asian Test Symposium, 2005, Kolkata, December 18-21, 2005, 2005

89 Biplab K Sikdar, Arijit sarkar, S Roy and Debesh K Das, Synthesis of Testable Finite State Machine Through Decomposition, 398-403, IEEE 14th Asian Test Symposium, 2005, Kolkata, December 18-21, 2005, 2005

90 Sukanta Das, Sipra Das(Bit) and Biplab K Sikdar, Non-linear Cellular Automata Based Design of Query Processor for Mobile Network, 3, 2751-56, IEEE SMC 2005 Conference, Hawaii, 2005

91 Biplab K Sikdar, Sukanta Das, S Roy, Niloy Ganguly and Debesh K Das, Cellular Automata Based Test Structures with Logic Folding, 71-74, 18th International Conference on VLSI Design 2005, Kolkata, India, 2005

92 Chandrama Shaw, Biplab K Sikdar and N C Maiti, Cellular Automata Based Document Compression Technology For On-Line Network Transmission, 303-306, ICECE2004, Bangladesh, December, 2004, 2004

93 Chandrama Shaw, Biplab k Sikdar and N C Maiti, CA based document compression technology, 679-685, ICONIP, India, December, 2004, 2004

94 Sukanta Das, Anirban Kundu and Biplab K Sikdar, Non-linear CA based design of test set generator targeting pseudo-random pattern resistant faults, Asian Test Symposium, Taiwan, November, 2004., 2004

95 Sukanta Das, Biplab K Sikdar, P Pal Chaudhuri, Non-linear CA based scalable design of on-chip TPG for multiple cores, Asian Test Symposium, Taiwan, November, 2004, 2004

96 Sukanta Das, Debdas Dey, Subhayan Sen, Biplab K Sikdar and Pal Chaudhuri, An Efficient Design of Non-Linear CA based PRPG for VLSI Circuit Testing, 110-112, ASPDAC, 2004, Japan, 2004

97 Sukanta Das, Anirban Kundu, Subhayan Sen, Biplab K Sikdar and P Pal Chaudhuri, Non-Linear Cellular Automata based PRPG Design (Without Prohbited Pattern Set) in Linear time Complexity, 78-83, Asian Test Symp, 2003, Xian, China, 2003

98 S Roy and Biplab K Sikdar, Power Conscious BIST Design for Sequen- tial Circuits using Ghost-FSM, 190-195, Asian Test Symposium, 2003, Xian, China, 2003

99 S Roy, U Maulik, A Bandyopadhyay, S Basu and Biplab K Sikdar, Efficient BIST design for Sequential Machines using FiF-FoF values in machine states, 875-878, ASP-DAC, 2003, Japan, 2003

100 S Roy, U Maulik and Biplab K Sikdar, Exploring Ghost-FSMs as a BIST Structure for Sequential Machines, 155-160, 16th Intl. Conference on VLSI Design, 2003, Delhi, India, 2003

101 Sukanta Das, Niloy Ganguly, Biplab K Sikdar and P Pal Chaudhuri, Design of a Universal BIST (UBIST) Structure, 161-166, 16th International Conference on VLSI Design, 2003, Delhi, India, 2003

102 U Bhattacharya, D Datta, B Chowdhury, G C Saha and B K Sikdar, A reliable & scalable logical topology for multihop optical networks, Intl. Conference CIT, December 2002, Bhubaneswar, India., 2002

103 Niloy Ganguly, Anindyasundar Nandi, Sukanta Das, Biplab K Sikdar and P Pal Chaudhuri, An Evolutionary Design of Pseudo-Random Test Pattern Generator without Prohibited Pattern Set (PPS), 260-265, Asain Test Symposium, November 2002, Guam, USA, 2002

104 U Bhattacharya, D Datta, B Chowdhury, G C Saha and B K Sikdar, A congestion-controlled logical topology for multihop optical networks, 416-418, IEEE International Conference TENCON02, Oct 2002, Beijing, China, 2002

105 U Bhattacharya, R Chaki, N Chaki and B K Sikdar, Design of a scalable logical topology for reliable optical communication, 1209-1212, IEEE Intl. Conference TENCON02, Oct 2002, Beijing, China, 2002

106 Sourav Saha, Pradipta Maji, Niloy Ganguly, Biplab K Sikdar and P Pal Chaudhuri, Evolving Cellular Automata Model for PatternClassification and Recognition, 114-119, IEEE International Conference on Systems, Man and Cybernetics, 2002, Tunisia, 2002

107 Niloy Ganguly, Pradipta Maji, Arijit Das, Biplab K Sikdar and P Pal Chaudhuri, Characterization of Non-linear Cellular Automata Model for Pattern Recognition, AFSS International Conference on Fuzzy Systems, 2002, India, 2002

108 Samir Roy, Biplab K Sikdar, Monalisa Mukherjee and Debesh K Das, Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area, 671-676, 15th Intl. Conference on ASPDAC/VLSI Design, 2002, January India, 2002

109 Niloy Ganguly, Biplab K Sikdar and P Pal Chaudhuri, Design of On-Chip Test Pattern Generator Without Prohibited Pattern Set (PPS), 689-694, 15th International Conference on ASPDAC/VLSI Design, January 2002, India, 2002

110 Niloy Ganguly, Arijit Das, Biplab K Sikdar and P Pal Chaudhuri, Cellular Automata Model for Cryptosystem, 120-125, Cellular Automata Conference, Nov 2001, Japan, 2001

111 Biplab K Sikdar, Niloy Ganguly, Debesh K Das and P Pal Chaudhuri, Hierarchical Cellular Automata Model For VLSI Testing, 90-95, Cellular Automata Conference, November 2001, Japan, 2001

112 Pradipta Maji, Niloy Ganguly, Arijit Das, Biplab K Sikdar and P Pal Chaudhuri, Study of Non-linear Cellular Automata Model for Pattern Recognition, 187-192, Cellular Automata Conference, November 2001, Japan, 2001

113 Niloy Ganguly, Biplab K Sikdar and P Pal Chaudhuri, Cellular Automata Based Hamming Hash Family Synthesis and Application, 213-220, 9th Intl. Conference on Advanced Computing and Communications, December 2001, India, 2001

114 Monalisa Mukherjee, Biplab K Sikdar, Niloy Ganguly and P Pal Chaudhuri, GF(2p) Cellular Automata as a Message Digest Generator, 205-212, 9th International Conference on Advanced Computing and Communications, Dec 2001, India, 2001

115 Niloy Ganguly, Arijit Das, Pradipta Maji, Biplab K Sikdar and P Pal Chaudhuri, Evolving Cellular Automata Based Associ- ative Memory for Pattern Recognition, 115-124, 8th Intl. Conference on High Performance Computing, December 2001, India, 2001

116 Biplab K Sikdar, Samir Roy and Debesh K Das; Asian Test Symp, November 2001, Japan, Enhancing BIST Quality of Sequential Machines Through Degree-of-freedom Analysis, 285-290, Asian Test Symp, November 2001, Japan, 2001

117 Biplab K Sikdar, Niloy Ganguly, Aniket Karmakar, Subha Sankar Chowdhury and P Pal Chaudhuri, Multiple Attractor Cellular Automata for Hierarchical Diagnosis of VLSI Circuits, 385-390, Asian Test Symposium, November 2001, Japan, 2001

118 Biplab K Sikdar, Purnabha Majumder, M Mukherjee, Niloy Ganguly, Debesh K Das and P Pal Chaudhuri, Hierarchical Cellular Automata as an On-Chip Test Pattern Generator, 403-408, 14th Intl. Conference on VLSI Design, January 2001, India, 2001

119 Biplab K Sikdar, Niloy Ganguly, Purnabha Majumder, and P Pal Chaudhuri, Design of Multiple Attractor GF(2p)Cell- ular Automata for Diagnosis of VLSI Circuits, 454-459, 14th International Conference on VLSI Design, January 2001, India, 2001

120 Paul, Kolin and Chaudhuri, Santashil Pal and Ghosal, Ranadeep and Sikdar, Biplab and Choudhury, D. Roy, GF(2^p) CA based vector quantization for fast encoding of still images, 140-143, Proceedings of the IEEE International Conference on VLSI Design, 2000

121 Niloy Ganguly, Debasish Halder, Janmejoy Deb, Biplab K Sikdar and P Pal Chaudhuri, Hashing Through Cellular Automata, 95-101, 8th Intl. Conference on Advanced Computing and Communications, December 2000, India, 2000

122 Kolin Paul, Santoshil Pal Chaudhuri, Ranadeep Ghosal, Biplab Sikdar and D Roy Choudhury, GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images, 140-143, 13th International Conference on VLSI Design, Jan 2000, India, 2000

123 Biplab K Sikdar, Kolin Paul, Gosta Pada Biswas, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee and P Pal Chaudhuri, Theory and Application of GF(2p) Cellular Automata As On-Chip Test Pattern Generator, 556-561, 13th Intl. Conference on VLSI Design, Jan 2000, India, 2000

124 P Pal Chaudhri, D R Chowdhuri, Kolin Paul and Biplab K Sikdar, Theory and Application of Cellular Automata for VLSI design and testing, 4-4, 13th International Conference on VLSI Design, January 2000, India, 2000

125 Biplab K Sikdar, Debesh K Das and Bhargav B Bhattacharya, Fixed Spectral Coefficients for Detecting Multiple Stuck-at Faults in Combinational Circuits, 133-137, 4th Intl. Workshop on Applications of the Reed Muller Expansion in Circuit Design, 1999, Canada, 1999

1 Biplab K Sikdar and Sipra DasBit, Mobile Computing, PHI, 2009