Dr. Surajit Kumar Roy is currently an Associate Professor in the Department of Information Technology, Indian Institute of Engineering Science and Technology, Shibpur, India. He received the B.Sc. (Hons. in Physics) from Calcutta University, India. He also received a Bachelor of Technology in computer science and engineering and subsequently a Master of Technology in computer science and engineering from Calcutta University, India in 2002 and 2004. He was awarded a Ph.D. degree from the Indian Institute of Engineering Science and Technology (IIEST), Shibpur.
• PhD (IIEST,)
• M.Tech., Computer Science and Engineering, University of Calcutta
• B.Tech., Computer Science and Engineering, University of Calcutta
• B.Sc., Physics (H), University of Calcutta
His research interest includes VLSI testing, 3D Integrated Circuits, TSV testing and recovery Embedded Systems, Hardware security. He was a recipient of the Best Ph.D. Thesis Award in ATS’16. He has contributed several research articles in peer-reviewed international journals and conferences.
1
Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri, Built-in Self-prevention (BISP) for runtime ageing effects of TSVs in 3D ICs, 94, 1-9, Integration, VLSI Journal, 2024
2
Rakesh Mondal, Surajit Kumar Roy and Chandan Gir, Solar Power Forecasting Using Domain Knowledge, Energy, 2024
3
Tapobrata Dhar, Ranit Das, Chandan Giri, Surajit Kumar Roy, Threshold Analysis Using Probabilistic Xgboost Classifier for Hardware Trojan Detection, 39(4), 447-463, J. Electron. Test, 2023
4
Sourav Ghosh, Surajit Kumar Roy, Chandan Giri, Fault Detection and Diagnosis of DMFB Using Concurrent Electrodes Actuation, 39(1), 89-102, J. Electron. Test., 2023
5
Dilip Kumar Maity, Surajit Kumar Roy and Chandan Giri, Cluster-Aware Allocation of Spare TSVs for Enhanced Reliability in 3D ICs, Microelectronics Reliability, 2023
6
Subhajit Chatterjee, Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman, Frequency-scaled thermal-aware test scheduling for 3D ICs using machine learning based temperature estimation, Microelectronics Journal, 2022
7
A Cost-Effective Built-In Self-Test Mechanism for Post-Manufacturing TSV Defects in 3D ICs, Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri, 18(4), ACM Journal on Emerging Technologies in Computing System, 2022
8
Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri, TSV-Cluster Defect Tolerance Using Tree-Based Redundancy for Yield Improvement of 3-D ICs, 40(8), 1500-1510, IEEE Transaction on Comput. Aided Des. Integr. Circuits System, 2021
9
Tapabrata Dhar, Surajit Kumar Roy and Chandan Giri, Hardware Trojan Detection by Stimulating Transitions in Rare Nets, 537-538, VLSI Design Conference (VLSID), 2019
10
Dilip Kumar Maity, Surajit Kumar Roy and Chandan Giri, Identification of Random/Clustered TSV Defects in 3D IC during Pre-bond Testing, Accepted for publication in Journal of Electronic Testing:Theory and Applications (JETTA), Springer, 2019
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