School of VLSI Technology

VLSI Design

Programmes Offered
Post Graduate Level
I. Degree offered : M. Tech in VLSI Design
II. Sanctioned students’ intake : 18
III. Specializations in : VLSI Design

About the M-Tech. program

The M-Tech. program is a two-year course oriented graduate program. The student has to take a set of core courses and a set of electives. The course work is spread accross the first two semesters with an option of taking one elective in the third semester. This is followed by a project in the third and fourth semester in which the student can take up a project of his or her interest, supervised by a faculty member.

Course Structure and Syllabus of Master of Technology in VLSI Design

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Programmes Offered

Doctoral & Post Doctoral Research Programme
I. Degree offered : PhD (Engineering)
II. No of Candidates enrolled : 01
III. No. of Candidates registered: 11
IV. PhD Awarded using resources of School of VLSI Technology – 12

About the Ph.D. program

The PhD. programs are postgraduate research oriented programs. The scholar works in an area of his/her interest under the supervision of a faculty member. The scholar has to obtain a minimum number of credits by taking courses. The highlight of the program is the independent research work taken by scholar, leading to a dissertation at the end of the program. The average duration of a PhD. program is between four to five years.

3D IC is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. To continue reducing the cost per function, even in the deeper nanoscale technology node a possible solution is to move to a 3 Dimensional (3D) stacking of ICs to bridge the gap between the capabilities of traditional 2D scaling and future system requirements. The challenges being faced include, bandwidth improvement, power and form factor reduction, heterogeneous integration, and modular design requirements. By leveraging 3D IC integration, these challenges may be overcome. The goal is to concurrently explore the technology and design issues associate with 3D technology applications for next generation high performance networking systems.

Microfluidic Biochip: The recent advancement in microfabrication and microfluidic technology has made it possible to shrink an entire laboratory based protocol into a single lab-on-chip system. The development of such devices has made great impact in the domains of biotechnology, pharmacology, medical diagnostics, forensics, environmental monitoring and other basic research. A more recent variation in Lab on chip devices namely Digital microfluidic biochip (DFMB) systems have been developed as a promising platform for Lab-on-chip systems that manipulate individual droplet of chemicals on a 2D planar array of electrodes.

As department of VLSI design is developed primarily to cater to the needs of industry, the aim of the circuit design group here is to work on live industrial and research projects. Strong collaboration with industry as well as leading institutes of national and international importance and other premier research labs is necessary to achieve our goal. As the energy security is one of the main concern that haunts the mankind, our prime focus is to design low power circuits to suit the needs of our day to day life. As our mission is to work on projects that will benefit human being we are keenly interested to work on projects for biomedical applications e.g. frontend and backend circuits for various imaging applications, Biochip applications, Neural ECG/EEG recording and associated signal processing circuitry. Some of the other areas of our interest are on low power/energy communication, energy harvesting, adaptive/reconfigurable ASIC design.

Silicon photonics is an upcoming but broad area of research having several industrial applications e.g. telecommunications and high performance computing. In the computing scenario there are several innovative solutions like photonic reservoir computing (photonic neural networks), quantum computing, big data applications and many core systems. Our photonics research focus is on the study and development of photonic interconnects for high bandwidth on-chip communication. We are also investigating the use of photonic crystals in the development of on-chip communication resources.

Application Specific Integrated Circuit (ASIC) design for Medical Imaging system like Positron Emission Tomography (PET) is in progress. ASIC will process electrical signal produced by Gamma Ray detection using Scintillator crystal showing concentration of biologically active Nuclear tracer compound. This project is planned to be carried out in collaboration with VECC, Kolkata. 

With the recent advances in nanotechnology (nanoelectronics in particular), the door for innovation and product development for electronic applications has been forced wide open. The impact on nanotechnology has brought a paradigm shift in the VLSI sector. Advanced devices based on nanotechnology are set to change the face of the microchip in the coming years.

The computational study of post-Silicon MOS devicesespecially 2-D channel material (like MX­2, Graphene, Topological Insulator) FET with superior switching characteristics, is new and expanding area of research. Also the tunnel FET with its low power consumption and small subthreshold slope is fast emerging as a suitable candidate for the deeper nanoscale technology node.The major advantages of 2-D channels over bulk channels in MOSFET are the higher carrier mobility and the better electrostatic control over the channel. In addition,2-D materials possess optical transparency and mechanical flexibility which are suited for optoelectronics applications and flexible ICs. We venture to undertake development of numerical simulation software for 2-D channel material MOS Transistorsand TunnelFET. Our aim is not merely to obtain the various MOSFET parameters and output characteristics of these devices, but also to study the impact of non-ideality of 2-D channels (namely ripples, defects, impurities and thermal instabilities) and their impact on overall MOSFET performance.Further we look to develop analytical models for sensor applications of Tunnel FETs, CNT-FET. Also in focus are advanced memory devices like magnetic tunnel junction (MTJ) and resistive switching memories.

Limitations of conventional Copper interconnects is driving research for alternative interconnect materials and technologies for next-generation ICs. In this research, Carbon nanotubes, with their many attractive properties, are emerging as the frontrunners to potentially replace copper for interconnect. As interest in CNT and graphenenanoribbonbased interconnects gains momentum, a thermal analysis, circuit model and RF performanceanalysisof these interconnects is a very important area of research.

Microfluidic Biochip:The recent advancement in microfabrication and microfluidic technology has made it possible to shrink an entire laboratory based protocol into a single lab-on-chip system. The development of such devices has made great impact in the domains of biotechnology, pharmacology, medical diagnostics, forensics, environmental monitoring and other basic research. A more recent variation in Lab on chip devices namely Digital microfluidic biochip (DFMB) systems have been developed as a promising platform for Lab-on-chip systems that manipulate individual droplet of chemicals on a 2D planar array of electrodes.

Intelligent systems are a new wave of embedded and real-time systems that are highly connected, with massive processing power and performing complex applications. Intelligent systems (IS) provide a standardized methodological approach to solve important and fairly complex problems and obtain consistent and reliable results over time .Their pervasiveness is reshaping the real world and how we interact with our digital life .Application can be found in all domains: automotive, rail, aerospace, defence, energy, healthcare, telecoms and consumer electronics.

3D IC is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. To continue reducing the cost per function, even in the deeper nanoscale technology node a possible solution is to move to a 3 Dimensional (3D) stacking of ICs to bridge the gap between the capabilities of traditional 2D scaling and future system requirements.The challenges being faced include, bandwidth improvement, power and form factor reduction, heterogeneous integration, and modular design requirements. By leveraging 3D IC integration, these challenges may be overcome. The goal is to concurrently explore the technology and design issues associate with 3D technology applications for next generation high performance networking systems.

As for the data security and architecture part, our work is mostly focused on watermarking techniques. There are numerous different types of algorithms proposed in the current literature on Digital Image Watermarking methods but comparatively less focus have been imparted on the hardware realization of these algorithms due to the compatibility and complexity issues of the digital signal processing algorithm for image  watermarking with respect to VLSI implementation.Thus my research motivation and focus is on implementable and efficient VLSI architectures for digital image watermarking algorithms which could be optimized for either area consumption or speed or power utilization.The main application area for these architectures include the copy-right protection, authentication and digital rights management of multimedia.