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School of VLSI Technology

About the School


The School was established on July, 2006 starting with a flagship course of M-Tech (VLSI Design) with an intake 12 students. There was a special initiative from Ministry of IT, Govt. of India with a Special Manpower Development Project (Phase II) for necessary help to establish School. The need to integrate to efforts of scientists and engineers working with different fields of microelectronics and semiconductors devices has been the primary motivation of creation of this school. Faculty members of this Institute are also running a number of industry and Govt. funded research projects with active participation of SOVLSIT. A number of tools have been developed to carry out the VLSI research. About 8 PhD theses have been completed during the last five years in the field of VLSI design and test. Another seven students have already been registered for PhD in this area.

In the School of VLSI Technology, we have sufficient latest VLSI tools and hardware in our VLSI and Embedded systems Laboratories. The UG/PG/Doctoral students from Information Technology/Computer Science/Electronic Engg./Electrical Engg. are getting exposure with these industry standard tools and equipment. In eastern India, only two or three university/institutes have this type of laboratory.

M.Tech (VLSI Design) course under SMDP-II project was started during academic session 2006-2007 and continues to be a sought after program of the institute. Students of SOVLSIT have established their credentials through recruitment of international VLSI Design Companies and selection in PhD admission to different research laboratories/ IIT/IISC/ISI/Foreign Universities.

Vision & Mission


VLSI being an interdisciplinary field involving various aspects of electrical, communications, computer science, information technology, semiconductor physics and materials science, the SOVLSIT closely collaborates with other departments within BESU and other reputed academic institutions in both India and abroad to cater to the needs of the engineers in the making.

The research and education at School of VLSI Technology is closely associated with industry and several other primary academic Institutions of repute with an aim to foster cutting edge research and establishes the School as one of the pronounced leaders in field of VLSI and Microelectronics.

Academic Programs


# Title Duration Specializations Curriculum
1 Master of Technology (M. Tech.)
2 years

VLSI Design

Programmes Offered
Post Graduate Level
I. Degree offered : M. Tech in VLSI Design
II. Sanctioned students’ intake : 18
III. Specializations in : VLSI Design

About the M-Tech. program

The M-Tech. program is a two-year course oriented graduate program. The student has to take a set of core courses and a set of electives. The course work is spread accross the first two semesters with an option of taking one elective in the third semester. This is followed by a project in the third and fourth semester in which the student can take up a project of his or her interest, supervised by a faculty member.

Course Structure and Syllabus of Master of Technology in VLSI Design

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2 Doctor of Philosophy (Ph. D.)

Programmes Offered

Doctoral & Post Doctoral Research Programme
I. Degree offered : PhD (Engineering)
II. No of Candidates enrolled : 01
III. No. of Candidates registered: 11
IV. PhD Awarded using resources of School of VLSI Technology – 12

About the Ph.D. program

The PhD. programs are postgraduate research oriented programs. The scholar works in an area of his/her interest under the supervision of a faculty member. The scholar has to obtain a minimum number of credits by taking courses. The highlight of the program is the independent research work taken by scholar, leading to a dissertation at the end of the program. The average duration of a PhD. program is between four to five years.

 

Research Areas


1 3D IC and 3D Biochips

3D IC is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. To continue reducing the cost per function, even in the deeper nanoscale technology node a possible solution is to move to a 3 Dimensional (3D) stacking of ICs to bridge the gap between the capabilities of traditional 2D scaling and future system requirements. The challenges being faced include, bandwidth improvement, power and form factor reduction, heterogeneous integration, and modular design requirements. By leveraging 3D IC integration, these challenges may be overcome. The goal is to concurrently explore the technology and design issues associate with 3D technology applications for next generation high performance networking systems.

Microfluidic Biochip: The recent advancement in microfabrication and microfluidic technology has made it possible to shrink an entire laboratory based protocol into a single lab-on-chip system. The development of such devices has made great impact in the domains of biotechnology, pharmacology, medical diagnostics, forensics, environmental monitoring and other basic research. A more recent variation in Lab on chip devices namely Digital microfluidic biochip (DFMB) systems have been developed as a promising platform for Lab-on-chip systems that manipulate individual droplet of chemicals on a 2D planar array of electrodes.

2 Analog and Mixed Signals
3 Bio-chip Design Automation
4 Circuit Design and Implementation

As department of VLSI design is developed primarily to cater to the needs of industry, the aim of the circuit design group here is to work on live industrial and research projects. Strong collaboration with industry as well as leading institutes of national and international importance and other premier research labs is necessary to achieve our goal. As the energy security is one of the main concern that haunts the mankind, our prime focus is to design low power circuits to suit the needs of our day to day life. As our mission is to work on projects that will benefit human being we are keenly interested to work on projects for biomedical applications e.g. frontend and backend circuits for various imaging applications, Biochip applications, Neural ECG/EEG recording and associated signal processing circuitry. Some of the other areas of our interest are on low power/energy communication, energy harvesting, adaptive/reconfigurable ASIC design.

Silicon photonics is an upcoming but broad area of research having several industrial applications e.g. telecommunications and high performance computing. In the computing scenario there are several innovative solutions like photonic reservoir computing (photonic neural networks), quantum computing, big data applications and many core systems. Our photonics research focus is on the study and development of photonic interconnects for high bandwidth on-chip communication. We are also investigating the use of photonic crystals in the development of on-chip communication resources.

Application Specific Integrated Circuit (ASIC) design for Medical Imaging system like Positron Emission Tomography (PET) is in progress. ASIC will process electrical signal produced by Gamma Ray detection using Scintillator crystal showing concentration of biologically active Nuclear tracer compound. This project is planned to be carried out in collaboration with VECC, Kolkata. 

 

5 Devices and Emerging Technology Group

With the recent advances in nanotechnology (nanoelectronics in particular), the door for innovation and product development for electronic applications has been forced wide open. The impact on nanotechnology has brought a paradigm shift in the VLSI sector. Advanced devices based on nanotechnology are set to change the face of the microchip in the coming years.

The computational study of post-Silicon MOS devicesespecially 2-D channel material (like MX­2, Graphene, Topological Insulator) FET with superior switching characteristics, is new and expanding area of research. Also the tunnel FET with its low power consumption and small subthreshold slope is fast emerging as a suitable candidate for the deeper nanoscale technology node.The major advantages of 2-D channels over bulk channels in MOSFET are the higher carrier mobility and the better electrostatic control over the channel. In addition,2-D materials possess optical transparency and mechanical flexibility which are suited for optoelectronics applications and flexible ICs. We venture to undertake development of numerical simulation software for 2-D channel material MOS Transistorsand TunnelFET. Our aim is not merely to obtain the various MOSFET parameters and output characteristics of these devices, but also to study the impact of non-ideality of 2-D channels (namely ripples, defects, impurities and thermal instabilities) and their impact on overall MOSFET performance.Further we look to develop analytical models for sensor applications of Tunnel FETs, CNT-FET. Also in focus are advanced memory devices like magnetic tunnel junction (MTJ) and resistive switching memories.

Limitations of conventional Copper interconnects is driving research for alternative interconnect materials and technologies for next-generation ICs. In this research, Carbon nanotubes, with their many attractive properties, are emerging as the frontrunners to potentially replace copper for interconnect. As interest in CNT and graphenenanoribbonbased interconnects gains momentum, a thermal analysis, circuit model and RF performanceanalysisof these interconnects is a very important area of research.

Microfluidic Biochip:The recent advancement in microfabrication and microfluidic technology has made it possible to shrink an entire laboratory based protocol into a single lab-on-chip system. The development of such devices has made great impact in the domains of biotechnology, pharmacology, medical diagnostics, forensics, environmental monitoring and other basic research. A more recent variation in Lab on chip devices namely Digital microfluidic biochip (DFMB) systems have been developed as a promising platform for Lab-on-chip systems that manipulate individual droplet of chemicals on a 2D planar array of electrodes.

 

6 Digital VLSI Design
7 Digital Watermarking
8 Emerging devices and Interconnects
9 FPGA Synthesis and Testing
10 Nanoelectronics
11 Network on Chip
12 NOC & SOC Design
13 System on Chip Architectures
14 VLSI Architectures
15 VLSI Physical Design Automation
16 VLSI Systems Design and Development Group

Intelligent systems are a new wave of embedded and real-time systems that are highly connected, with massive processing power and performing complex applications. Intelligent systems (IS) provide a standardized methodological approach to solve important and fairly complex problems and obtain consistent and reliable results over time .Their pervasiveness is reshaping the real world and how we interact with our digital life .Application can be found in all domains: automotive, rail, aerospace, defence, energy, healthcare, telecoms and consumer electronics.

3D IC is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. To continue reducing the cost per function, even in the deeper nanoscale technology node a possible solution is to move to a 3 Dimensional (3D) stacking of ICs to bridge the gap between the capabilities of traditional 2D scaling and future system requirements.The challenges being faced include, bandwidth improvement, power and form factor reduction, heterogeneous integration, and modular design requirements. By leveraging 3D IC integration, these challenges may be overcome. The goal is to concurrently explore the technology and design issues associate with 3D technology applications for next generation high performance networking systems.

As for the data security and architecture part, our work is mostly focused on watermarking techniques. There are numerous different types of algorithms proposed in the current literature on Digital Image Watermarking methods but comparatively less focus have been imparted on the hardware realization of these algorithms due to the compatibility and complexity issues of the digital signal processing algorithm for image  watermarking with respect to VLSI implementation.Thus my research motivation and focus is on implementable and efficient VLSI architectures for digital image watermarking algorithms which could be optimized for either area consumption or speed or power utilization.The main application area for these architectures include the copy-right protection, authentication and digital rights management of multimedia.

 

17 VLSI Testing

Staff Members


Aloke Mandol

Group-D Staff
Supportive
alokemondal1975@gmail.com

Goutam Paul

Technical Assistant
Technical
goutam@vlsi.iiests.ac.in

Koushik Dey

Group-D Staff
Supportive
koushik.iiest.vlsi@gmail.com

Research Scholars


Anindita Chakraborty
Ph. D.
anindita.chakraborty.87@gmail.com

Research:
Memristor-based implementation of logic primitives and slicing architecture for fast computation.

Supervisor: Hafizur Rahaman

Annapurna Mondal
Ph. D.
write.to.annapurna@gmail.com

Research:
Circuits and Systems

Supervisor: Hafizur Rahaman

Arnab Mukherjee
Ph. D.
arnabm.electinstru@gmail.com
Supervisor: Hafizur Rahaman

Debaprasad Das
Ph. D.
dasdebaprasad@yahoo.co.in

Research:
Circuits and Systems

Supervisor: Hafizur Rahaman

Indrajit Pan
Ph. D.
p.indrajit@gmail.com

Research:
Design and Analysis of Droplet Routing Algorithms for Digital Microfluidic Biochips

Supervisor: Tuhina Samanta
Co-Supervisor: Hafizur Rahaman

Indranil Maity
Ph. D.
indranilmaity026.rs2016@vlsi.iiests.ac.in

Research:
Theoretical simulation and experimental validation of functionalized graphene based gas/vapor sensor devices

Supervisor: Partha Bhattacharyya

Kunal Sinha
Ph. D.
kunalsinha84@yahoo.co.in

Research:
Performance-Aware Stress Engineering for Nano-scaled FETs with Embedded SiGe Source and Drain

Supervisor: Hafizur Rahaman

Laxmidhar Biswal
Ph. D.
laxmidhar.cvrce@gmail.com

Research:
Fault-tolerant Techniques for Synthesis of Quantum Circuits

Supervisor: Hafizur Rahaman

Lupamudra Banerjee
Ph. D.
lopa.banerjee2003@gmail.com

Research:
Performance analysis of alternative 2-D channel materials in MOSFET

Supervisor: Hafizur Rahaman

Manas Kumar Parai
Ph. D.
manasparai@gmail.com

Research:
Fault Detection in Analog Circuits

Supervisor: Hafizur Rahaman
Co-Supervisor: Kasturi Ghosh

Nachiketa Das
Ph. D.
nachiketad@gmail.com

Research:
Issues of Design and Test of Field Programmable gate Array (FPGA)

Supervisor: Hafizur Rahaman

Partha Sarathi Gupta
Ph. D.
gupta_parthasarathi@yahoo.co.in

Research:
Tunnel Field Effect Transistors for Optoelectronic Applications

Supervisor: Hafizur Rahaman

Sabir Ali Mondal
Ph. D.
sabir.besus@gmail.com

Research:
Circuits and Systems

Supervisor: Hafizur Rahaman

Sandip Bhattacharya
Ph. D.
1983.sandip@gmail.com

Research:
1. Interconnect modeling for next generation on-chip integrated circuit design

Supervisor: Hafizur Rahaman

Sanghamitra Ghosal
Ph. D.
sanghamitra.ju87@gmail.com

Research:
Ternary Hybrid Junctions of Semiconducting Oxide Nanostructures, Reduced Graphene Oxide and Noble Metal for Improved Gas Sensor Device Applications

Supervisor: Partha Bhattacharyya

Sarosij Adak
Ph. D.
sarosijadak@gmail.com

Research:
Analysis of GaN Based Heterostructure Nano Devices

Supervisor: Hafizur Rahaman

Sayan Kanungo
Ph. D.
sayan.kanungo@hyderabad.bits-pilani.ac.in

Research:
Design of Dielectrically Modulated Field Effect Transistor for Electrochemical Biosensing

Supervisor: Hafizur Rahaman

Subhajit Chatterjee
Ph. D.
subhajit20@gmail.com

Research:
3D IC testing and verification.

Supervisor: Surajit Kumar Roy
Co-Supervisor: Hafizur Rahaman

Subhajit Das
Ph. D.
sjd.subha@gmail.com

Research:
Interconnect modeling for future VLSI circuit design High Power on-chip circuit design

Supervisor: Hafizur Rahaman

Sudip Poddar
Ph. D.
sudippoddar2006@gmail.com

Research:
Error-tolerant sample preparation with Digital microfluidic lab-on-chip

Supervisor: Hafizur Rahaman

Sudip Ghosh
Ph. D.
sudip_etc@yahoo.co.in

Research:
Circuits and Systems

Supervisor: Hafizur Rahaman
Co-Supervisor: Santi Prasad Maity

Sudipta Bardhan
Ph. D.
sudipta.bardhan15@gmail.com

Research:
Modelling and Simulation of Graphene FET for VLSI Circuit Applications

Supervisor: Hafizur Rahaman

Supriyo Srimani
Ph. D.
supriyosriman.rs2016@vlsi.iiests.ac.in

Research:
Fault detection in Analog and Mixed Signal circuits using statistical and machine learning models

Supervisor: Hafizur Rahaman

Projects


  • 1 Testing and design of CMOS linear and non-linear analog VLSI circuit, Agency: WOS-A, DST, Govt. of India, Year: 2011-14, (Role: PI)
    Funding Agent: Women Scientist Scheme-A, Department of Science and Technology, Government of India
    PI: Kasturi Ghosh

  • 2 Device, Circuits and Architectures for implementing Probabilistic Spin Logic for Energy Efficient Boolean and Non-Boolean Computing
    Funding Agent: Sparc, MHRD, GoI
    PI: Prof.Hafizur Rahaman

  • 3 Development of high efficiency power electronic converter technology using next generation Si/SiC-based switching devices with integrated gate drivers for high frequency operation at reduced losses
    Funding Agent: Sparc, MHRD, GoI
    PI: Prof.Hafizur Rahaman

  • 4 Design-for-Test Solutions for 3D Integrated circuits Amount-INR 89,34,225/- Sponsoring Agency: Sparc, MHRD, GoI
    Funding Agent: Sparc, MHRD, GoI
    PI: Prof.Hafizur Rahaman

  • 5 Design and ASIC implementation of Data Converter to be embedded with Versatile Data Acquisition and Signal Processing Platform
    Funding Agent: Diety, MCIT, Gov. of India
    PI: Prof.Hafizur Rahaman

  • 6 Testing and Design-for-Testability for Digital Integrated Circuits (Foreign Faculty: Prof. Krishnendu Chakrabarty, IEEE/ACM Fellow, Duke University, USA Host Faculty: Prof. Hafizur Rahaman)
    Funding Agent: GIAN Programme, MHRD
    PI: Prof.Hafizur Rahaman

  • 7 Charge and Spin Based Electronics: From Devices to Circuits and Systems (Foreign Faculty: Prof. Kaushik Roy, IEEE Fellow, Purdue University, USA Host Faculty: Hafizur Rahaman)
    Funding Agent: GIAN Programme, MHRD
    PI: Prof.Hafizur Rahaman

  • 8 Synthesis of Reversible Circuits using Probabilistic Methods and Functional Transformations
    Funding Agent: DST, India
    PI: Prof.Hafizur Rahaman

  • 9 Design and ASIC Implementation of S-Box Circuit for Efficient Implementation of AES Algorithm
    Funding Agent: DIT, Govt. of WB, India
    PI: Prof.Hafizur Rahaman-(Sole)

  • 10 Design and ASIC Implementation of VCO integrated with a buffer for gas sensing applications in mines and High Slew Rate High Gain Comparator for Low Phase Detection
    Funding Agent: DIT, MCIT, Govt. of India
    PI: Prof.Hafizur Rahaman

  • 11 Design and Development of Simulation Framework on Process and Device using Synopsys TCAD
    Funding Agent: AICTE India
    PI: Prof.Hafizur Rahaman- PI (Sole)

  • 12 Development of Computing Architecture in Cloud Environment
    Funding Agent: Cognizant Technologies Solution Ltd (CTS), Kolkata, India
    PI: Prof. Hafizur Rahaman (Sole)

  • 13 Efficient Test infrastructure Design for 3D Multi-core Integrated Circuits
    Funding Agent: University Grant Commission (UGC),India
    PI: PI :- Prof.Chandan Giri andCo PI: Prof.Hafizur Rahaman

  • 14 Efficient Synthesis of Optimized Testable Hardware for Polynomials over GF(2m)
    Funding Agent: Royal Society, United Kingdom
    PI: Prof. Hafizur Rahaman-PI (Sole)

  • 15 Development of FPGA Band Embedded System for Network on Chip (NOC) Application
    Funding Agent: AICTE, India
    PI: PI : Prof.P. Ghosal and Co-PI -Prof. Hafizur Rahaman
    Consultants: Prof. Hafizur Rahaman

  • 16 Fault Tolerant Routing in Wireless Sensor Networks
    Funding Agent: University Grant Commission (UGC),India
    PI: PI- Prof.Indrajit Banerjee and Co-PI- Prof. Hafizur Rahaman
    Consultants: Hafizur Rahaman

  • Publications


  • 1 Malay Kule, Hafizur Rahaman, and Bhargab B.Bhattacharya, Function-Mapping on Defective Nano-Crossbars with Enhanced Reliability, Malay Kule, Hafizur Rahaman, and Bhargab B.Bhattacharya, "Function-Mapping on Defective Nano-Crossbars with Enhanced Reliability", Vol. 19, pp.555–564, Journal of Computational Electronics (Springer), 2020
  • 2 Manas Parai, Supriyo Srimani, Kasturi Ghosh, and Hafizur Rahaman, Analog Circuit Fault Detection by Impulse Response Based Signature Analysis, Vol. 39, pp.4281–4296,, 1. Circuits, Systems, and Signal Processing (Springer), 2020
  • 3 Supriyo Srimani, Manas Parai, Kasturi Ghosh and Hafizur Rahaman, A Statistical Approach of Analog Circuit Fault Detection Utilizing Kolmogorov-Smirnov Test Method, Accepted on 3rd October 2020, Accepted on 3rd October 2020, Circuits, Systems & Signal Processing (CSSP) (Springer), 2020
  • 4 Pampa Howladar, Pranab Roy, and Hafizur Rahaman, Chip Level Design in MEDA Based Biochips: Application of Daisy Chain Based Actuation, Vol. (26), pp. 2337–2351, Microsystems Technologies (Springer Nature), 2020
  • 5 Sayan Kanungo, Budhaditya Majumdar, Subhas Mukhopadhyay, Debapriya Som, Sanatan Chattopadhyay and Hafizur Rahaman, Investigation on the Effects of Substrate, Back-Gate Bias and Front-Gate Engineering on the Performance of DMTFET based Biosensors, Vol. 20(18), pp.10405-10414, IEEE Sensors Journal, 2020
  • 6 Pampa Howladar,Pranab Roy,Hafizur Rahaman, Design Automation and Testing of MEDA Based Digital Microfluidic Biochips: A Brief Survey, 66, IETE Journal of Research ,Taylor and Francis., 2020
  • 7 Supriyo Srimani, Manas Parai, Kasturi Ghosh and Hafizur Rahaman, A Statistical Approach of Analog Circuit Fault Detection Utilizing Kolmogorov-Smirnov Test Method, Circuits, Systems & Signal Processing (Accepted, in press), 2020
  • 8 Manas Parai, Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman, Analog Circuit Fault Detection by Impulse Response-Based Signature Analysis, 39, 4281–4296, Circuits, Systems, and Signal Processing, 2020
  • 9 L. Banerjee, A Sengupta, and H. Rahaman, Carrier transport and thermoelectric properties of differently shaped Germanene (Ge) and Silicene (Si) nanoribbon interconnects, 66 (1), 664-669, IEEE Transactions on Electron Devices, 2019
  • 10 Bhattacharya, R. and Roy, P. and Rahaman, H., A complete routing simulator for digital microfluidic biochip, 10, 70-85, International Journal of Information System Modeling and Design, 2019
  • 11 Anindita Chakraborty,Vivek Saurabh,Partha Sarathi Gupta,Rituraj Kumar,Saikat Majumdar,Smriti Das and Hafizur Rahaman, In-Memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC), Vol (66), pp. 24-34, Integration, the VLSI Journal, (Elsevier), 2019
  • 12 Sabir Ali Mondal, Pradip Mondal and Hafizur Rahaman, 1. Sabir Ali Mondal, Pradip MondFast Locking, Startup Circuit Free, Low Area, 32-phase Analog DLL, Vol. (66), pp. 60-66, Integration, the VLSI Journal, (Elsevier), 2019
  • 13 Arnab Mukherjee, Tapas K. Maiti, H.Rahaman, 1. rnab Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs, Vol.E102-C (6), pp.487-494, IEICE Transactions on Electronics, 2019
  • 14 Kasturi Ghosh, Niladri S. Mahapatra, Hafizur Rahaman and Partha Bhattacharyya, Prediction of Adsorption Probability of Oxidizing and Reducing Species on 2D Hybrid Junction of rGO-ZnO from First Principle Analysis, vol. 18(1), pp. 119-125, IEEE Transactions on Nanotechnology 2019,, 2019
  • 15 Pampa Howladar, Pranab Roy, and Hafizur Rahaman, A High-Performance Homogeneous Droplet Routing Technique for MEDA Based Biochips, 15 (4), pp. 1-37, ACM Journal on Emerging Technologies in Computing Systems, 2019
  • 16 Sharma, B. and Mukhopadhyay, A. and Banerjee, L. and Sengupta, A. and Rahaman, H. and Sarkar, C.K., Ab initio study of mono-layer 2-D insulators (X-(OH)2 and h-BN) and their use in MTJ memory device, 25, 1909-1917, Microsystem Technologies, 2019
  • 17 Sinharay, A. and Das, S. and Roy, P. and Rahaman, H., An Angular Steiner Tree Based Global Routing Algorithm for Graphene Nanoribbon Circuit, 892, 670-681, Communications in Computer and Information Science, 2019
  • 18 Mondal, B. and Bandyopadhyay, C. and Bhattacharjee, A. and Rahaman, H., An Online Testing Scheme for Detection of Gate Faults in ESOP-Based Reversible Circuit, Journal of The Institution of Engineers (India): Series B, 2019
  • 19 Bardhan, S. and Sahoo, M. and Rahaman, H., Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects, 13, 421-427, IET Circuits, Devices and Systems, 2019
  • 20 Mondal, J. and Mondal, B. and Kole, D.K. and Rahaman, H. and Das, D.K., Boolean Difference Technique for Detecting All Missing Gate and Stuck-at Faults in Reversible Circuits, Journal of Circuits, Systems and Computers, 2019
  • 21 Banerjee, L. and Sengupta, A. and Rahaman, H., Carrier Transport and Thermoelectric Properties of Differently Shaped Germanene (Ge) and Silicene (Si) Nanoribbon Interconnects, 66, 664-669, IEEE Transactions on Electron Devices, 2019
  • 22 Das, S. and Bhattacharya, S. and Das, D. and Rahaman, H., Comparative stability analysis of pristine and asf5 intercalation doped top contact graphene nano ribbon interconnects, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 23 Bandyopadhyay, C. and Das, R. and Chattopadhyay, A. and Rahaman, H., Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures, 13, 38-48, IET Computers and Digital Techniques, 2019
  • 24 Bardhan, S. and Sahoo, M. and Rahaman, H., Empirical Drain Current Model of Graphene Field-Effect Transistor for Application as a Circuit Simulation Tool, IETE Journal of Research, 2019
  • 25 Mondal, S.A. and Mandal, P. and Rahaman, H., Fast locking, startup-circuit free, low area, 32-phase analog DLL, 66, 60-66, Integration, 2019
  • 26 L. Banerjee, A Sengupta, and Hafizur Rahaman, Carrier transport and thermoelectric properties of differently shaped Germanene (Ge) and Silicene (Si) nanoribbon interconnects, Vol.66 (1), pp.664-669, IEEE Transactions on Electron Devices, 2019
  • 27 Subhajit Das, Sandip Bhattacharya, Debaprasad Das, and Hafizur Rahaman, Modeling and Analysis of Electro-thermal Impact of Crosstalk Induced Gate Oxide Reliability in Pristine and Intercalation Doped MLGNR Interconnects, Vol. 19(3), pp. 543-550, IEEE Transactions on Device and Materials Reliability, 2019
  • 28 Laxmidhar Biswal, Debjyoti Bhattacharjee, Anupam Chattopadhyay and Hafizur Rahaman, Techniques for fault-tolerant decomposition of multicontrolled Toffoli gates, Vol. 100, 062326, 062326, Physical Review A (Published 19 December 2019), 2019
  • 29 Chakraborty, A. and Saurabh, V. and Gupta, P.S. and Kumar, R. and Majumdar, S. and Das, S. and Rahaman, H., In-memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC), 66, 24-34, Integration, 2019
  • 30 Ghosh, K. and Mahapatra, N.S. and Rahaman, H. and Bhattacharyya, P., Prediction of adsorption probability of oxidizing and reducing species on 2-D hybrid junction of rGO-ZnO from first principle analysis, 18, 119-125, IEEE Transactions on Nanotechnology, 2019
  • 31 Mukhopadhyay, A. and Maiti, T.K. and Bhattacharya, S. and Iizuka, T. and Kikuchihara, H. and Miura-Mattausch, M. and Rahaman, H. and Yoshitomi, S. and Navarro, D. and Mattausch, H.J., Prevention of highly power-efficient circuits due to short-channel effects in MOSFETs, E102C, 487-494, IEICE Transactions on Electronics, 2019
  • 32 Bhattacharjee, A. and Bandyopadhyay, C. and Biswal, L. and Rahaman, H., A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture, 892, 593-605, Communications in Computer and Information Science, 2019
  • 33 Pampa Howladar,Pranab Roy,Subhajit Chatterjee,Hafizur Rahaman, Chip Level Design in MEDA Based Biochips: Application of Daisy Chain Based Actuation, 26, 2337 -2351, Springer Microsystem Technologies, 2019
  • 34 Bardhan, S. and Sahoo, M. and Rahaman, H., A Surface Potential-Based Model for Dual Gate Bilayer Graphene Field Effect Transistor Including the Capacitive Effects, Journal of Circuits, Systems and Computers, 2019
  • 35 Pampa Howladar,Pranab Roy,Hafizur Rahaman, A High-Performance Droplet Routing Technique for MEDA Based Biochips, 15, 70-85, ACM Journal on Emerging Technology in Computing, 2019
  • 36 Kasturi Ghosh, Hafizur Rahaman, Partha Bhattacharyya, Prediction and Implementation of Graphene and Other Two-Dimensional Material Based Superconductors: A Review, 30, 1-9, IEEE Transactions on Applied Superconductivity, 2019
  • 37 Kasturi Ghosh, Niladri S Mahapatra, Hafizur Rahaman, Partha Bhattacharyya, Prediction of adsorption probability of oxidizing and reducing species on 2-D hybrid junction of rGO-ZnO from first principle analysis, 18, 119-125, IEEE Transactions on Nanotechnology, 2018
  • 38 Bhattacharya, S. and Das, D. and Rahaman, H., Analysis of Simultaneous Switching Noise and IR-Drop in Side-Contact Multilayer Graphene Nanoribbon Power Distribution Network, 27, Journal of Circuits, Systems and Computers, 2018
  • 39 Bhattacharya, S. and Das, D. and Rahaman, H., Analysis of delay fault in GNR power interconnects, 31, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 2018
  • 40 Kule, M. and Rahaman, H. and Bhattacharya, B.B., Maximal Defect-Free Component in Nanoscale Crossbar Circuits Amidst Stuck-Open and Stuck-Closed Faults, Journal of Circuits, Systems and Computers, 2018
  • 41 Anindita Chakraborty,Vivek Saurabh,Partha Sarathi Gupta,Rituraj Kumar,Saikat Majumdar,Smriti Das and Hafizur Rahaman, In-Memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC), Integration, the VLSI Journal, (Elsevier), 2018
  • 42 Sandip Bhattacharya,Subhajit Das, Arnab Mukhopadhyay, Debaprasad Das, and Hafizur Rahaman, Analysis of Temperature Dependent Delay Optimization Model for GNR Interconnect Using Wire Sizing Method, Journal of Computational Electronics (Springer), 2018
  • 43 Subhajit Das, Debaprasad Das, and Hafizur Rahaman, Electro-thermal RF Modeling and Performance Analysis of Graphene Nanoribbon Interconnects, Journal of Computational Electronics (Springer), 2018
  • 44 Laxmidhar Biswal,Rakesh Das, Chandan Bandyopadhyay,Anupam Chattopadhyay and Hafizur Rahaman, A Template-based Technique for Efficient Clifford+T-based Quantum Circuit Implementation, 81 (2018), 58-68, Microelectronics Journal (Elsevier), 2018
  • 45 Sudip Poddar, Robert Wille, Hafizur Rahaman and Bhargab B. Bhattacharya, Error-Oblivious Sample Preparation with Digital Microfluidic Lab-on-Chip, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
  • 46 Rupam Bhattacharya, Pranab Roy and Hafizur Rahaman, Homogeneous Droplet Routing In DMFB: An Enhanced Technique For High Performance Bioassay Implementation, Vol. 60, pp.74-91, Integration, the VLSI Journal, (Elsevier), 2018
  • 47 Chandan Bandyopadhyay, Rakesh Das, Robert Wille, Rolf Drechsler and Hafizur Rahaman, Synthesis of Circuits based on All-Optical Mach-Zehnder Interferometers Using Binary Decision Diagrams, VOL. 71, pp. 19-29, Microelectronics Journal(Elsevier), 2018
  • 48 Laxmidhar Biswal,Rakesh Das, Chandan Bandyopadhyay,Anupam Chattopadhyay and Hafizur Rahaman, A Template-based Technique for Efficient Clifford+T-based Quantum Circuit Implementation, Vol. 81, pp.58-68, Microelectronics Journal (Elsevier), 2018
  • 49 Subhajit Das, Debaprasad Das, and Hafizur Rahaman, Electro-thermal RF Modeling and Performance Analysis of Graphene Nanoribbon Interconnects, Vol. 17, pp. 1695–1708, Journal of Computational Electronics (Springer), 2018
  • 50 Sandip Bhattacharya, Subhajit Das, Arnab Mukhopadhyay, Debaprasad Das and Hafizur Rahaman, Analysis of a temperature-dependent delay optimization model for GNR interconnects using a wire sizing method, Vol. 17(4), pp 1536–1548, Journal of Computational Electronics (Elsevier), 2018
  • 51 Sudip Poddar, Robert Wille, Hafizur Rahaman and Bhargab B. Bhattacharya, Error-Oblivious Sample Preparation with Digital Microfluidic Lab-on-Chip, Vol. 38(10), pp.1886 - 1899, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
  • 52 Biswal, L. and Das, R. and Bandyopadhyay, C. and Chattopadhyay, A. and Rahaman, H., A template-based technique for efficient Clifford+T-based quantum circuit implementation, 81, 58-68, Microelectronics Journal, 2018
  • 53 Bhattacharya, S. and Das, S. and Mukhopadhyay, A. and Das, D. and Rahaman, H., Analysis of a temperature-dependent delay optimization model for GNR interconnects using a wire sizing method, 17, 1536-1548, Journal of Computational Electronics, 2018
  • 54 Howladar, P. and Roy, P. and Rahaman, H., Design Automation and Testing of MEDA-Based Digital Microfluidic Biochips: A Brief Survey, IETE Journal of Research, 2018
  • 55 Das, S. and Das, D. and Rahaman, H., Electro-thermal RF modeling and performance analysis of graphene nanoribbon interconnects, 17, 1695-1708, Journal of Computational Electronics, 2018
  • 56 Poddar, S. and Wille, R. and Rahaman, H. and Bhattacharya, B.B., Error-Oblivious Sample Preparation with Digital Microfluidic Lab-on-Chip, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
  • 57 Hazra, S. and Ghosh, S. and De, S. and Rahaman, H., FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time, 14, 193-221, Journal of Real-Time Image Processing, 2018
  • 58 Bhattacharya, R. and Roy, P. and Rahaman, H., Homogeneous droplet routing in DMFB: An enhanced technique for high performance bioassay implementation, 60, 74-91, Integration, the VLSI Journal, 2018
  • 59 Bandyopadhyay, C. and Parekh, S. and Rahaman, H., Improved circuit synthesis approach for exclusive-sum-of-product-based reversible circuits, 12, 167-175, IET Computers and Digital Techniques, 2018
  • 60 Maity, I. and Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Spin Dependent Electronic Transport in Edge Oxidized Zigzag Graphene Nanoribbon, 5, 9892-9898, Materials Today: Proceedings, 2018
  • 61 Bandyopadhyay, C. and Das, R. and Wille, R. and Drechsler, R. and Rahaman, H., Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams, 71, 19-29, Microelectronics Journal, 2018
  • 62 Rupam Bhattacharya, Pranab Roy,Hafizur Rahaman, Homogeneous Droplet Routing in DMFB: An Enhanced Technique for High Performance Bioassay Implementation, 60, 74 -91, Elsevier,VLSI Integration, 2018
  • 63 I Maity, K Ghosh, H Rahaman, Partha Bhattacharyya, Selectivity Tuning of Graphene Oxide Based Reliable Gas Sensor Devices by Tailoring the Oxygen Functional Groups: A DFT Study Based Approach, 17, 738-745, IEEE Transactions on Device and Materials Reliability, 2017
  • 64 Supriyo Srimani, Manas Kumar Parai, Kasturi Ghosh, Hafizur Rahaman, Parametric fault detection of analog circuits based on Bhattacharyya measure, 93, 477-488, Analog Integrated Circuits and Signal Processing, 2017
  • 65 K Ghosh, H Rahaman, Partha Bhattacharyya, Potentiality of Density-Functional Theory in Analyzing the Devices Containing Graphene-Crystalline Solid Interfaces: A Review, 64, 4738-4745, IEEE Transactions on Electron Devices, 2017
  • 66 I Maity, K Ghosh, H Rahaman, P Bhattacharyya, Tuning of electronic properties of edge oxidized armchair graphene nanoribbon by the variation of oxygen amounts and positions, 28, 9039-9047, Journal of Materials Science: Materials in Electronics, 2017
  • 67 Sinha, K. and Chattopadhyay, S. and Gupta, P.S. and Rahaman, H., A technique to incorporate both tensile and compressive channel stress in Ge FinFET architecture, 16, 620-630, Journal of Computational Electronics, 2017
  • 68 Sahoo, M. and Rahaman, H., Analysis of Crosstalk-Induced Effects in Multilayer Graphene Nanoribbon Interconnects, 26, Journal of Circuits, Systems and Computers, 2017
  • 69 Das, D. and Rahaman, H., Carbon nanotube and graphene nanoribbon interconnects, 1-168, Carbon Nanotube and Graphene Nanoribbon Interconnects, 2017
  • 70 Kanungo, S. and Mondal, S.A. and Chattopadhyay, S. and Rahaman, H., Design and Investigation on Bioinverter and Bioring-Oscillator for Dielectrically Modulated Biosensing Applications, 16, 974-981, IEEE Transactions on Nanotechnology, 2017
  • 71 Adak, S. and Swain, S.K. and Pardeshi, H. and Rahaman, H. and Sarkar, C.K., Effect of barrier thickness on linearity of underlap AlInN/GaN DG-MOSHEMTs, 12, Nano, 2017
  • 72 Tiwari, S. and Dolai, S. and Rahaman, H. and Gupta, P.S., Effect of temperature and phonon scattering on the drain current of a MOSFET using SL-MoS as its channel material, 463, 108-117, Journal of Non-Crystalline Solids, 2017
  • 73 Supriyo Srimani, Kasturi Ghosh, and Hafizur Rahaman, Parametric Fault Detection of Analog Circuits based on Bhattacharyya Measure, 93(3), 477–488, Analog Integrated Circuits and Signal Processing (Springer), 2017
  • 74 Sayan Kanunga, Sabir Ali Mondal, Sanatan Chottopadhyaya and Hafizur Rahaman, Design and Investigation on Bio-Inverter and Bio-Ring-oscillator for Dielectrically Modulated Bio-sensing Applications, 16(6), 974 – 981, IEEE Transactions on Nanotechnology, 2017
  • 75 Sayan Kanungo, Sanatan Chattopadhyay, Kunal Sinha, Partha Sarathi Gupta, and Hafizur Rahaman, A Device Simulation-Based Investigation on Dielectrically Modulated Fringing Field-Effect Transistor for Biosensing Applications, 17(5), 1399-1406, IEEE Sensors Journal, 2017
  • 76 Supriyo Srimani, Kasturi Ghosh, and Hafizur Rahaman, Parametric Fault Detection of Analog Circuits based on Bhattacharyya Measure, Vol.93(3), pp 477–488, Analog Integrated Circuits and Signal Processing (Springer), 2017
  • 77 Kunal Sinha, Sanatan Chattopadhyay, Partha Sarathi Gupta and Hafizur Rahaman, A Technique to incorporate both tensile and compressive channel stress in Ge FinFET architecture, Volume 16 (3), pp 620–630, Journal of Computational Electronics (Springer), 2017
  • 78 Kasturi Ghosh, Hafizur Rahaman and Partha Bhattacharyya, Potentiality of Density-Functional Theory in Analyzing the Devices Containing Graphene - Crystalline Solid Interfaces, Vol.64 (11), pp.4738-4745, IEEE Transactions on Electron Devices, 2017
  • 79 Sayan Kanungo, Sanatan Chattopadhyay, Kunal Sinha, Partha Sarathi Gupta, and Hafizur Rahaman, A Device Simulation-Based Investigation on Dielectrically Modulated Fringing Field-Effect Transistor for Biosensing Applications, Vol.17(5), pp.1399-1406, IEEE Sensors Journal, 2017
  • 80 Sayan Kanunga, Sabir Ali Mondal, Sanatan Chottopadhyaya and Hafizur Rahaman, Design and Investigation on Bio-Inverter and Bio-Ring-oscillator for Dielectrically Modulated Bio-sensing Applications, Vol. 16(6), pp. 974 – 981, IEEE Transactions on Nanotechnology, 2017
  • 81 Kanungo, S. and Chattopadhyay, S. and Sinha, K. and Gupta, P.S. and Rahaman, H., A Device Simulation-Based Investigation on Dielectrically Modulated Fringing Field-Effect Transistor for Biosensing Applications, 17, 1399-1406, IEEE Sensors Journal, 2017
  • 82 Tiwari, S. and Dolai, S. and Rahaman, H. and Gupta, P.S., Effect of temperature and phonon scattering on the drain current of a MOSFET using SL-MoS as its channel material, 111, 912-921, Superlattices and Microstructures, 2017
  • 83 Bhattacharya, S. and Das, D. and Rahaman, H., Modeling and Performance Analysis of Graphene Nanoribbon Interconnects, 40, 325-329, National Academy Science Letters, 2017
  • 84 Srimani, S. and Parai, M.K. and Ghosh, K. and Rahaman, H., Parametric fault detection of analog circuits based on Bhattacharyya measure, 93, 477-488, Analog Integrated Circuits and Signal Processing, 2017
  • 85 Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Potentiality of Density-Functional Theory in Analyzing the Devices Containing Graphene-Crystalline Solid Interfaces: A Review, 64, 4738-4745, IEEE Transactions on Electron Devices, 2017
  • 86 Maity, I. and Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Selectivity Tuning of Graphene Oxide Based Reliable Gas Sensor Devices by Tailoring the Oxygen Functional Groups: A DFT Study Based Approach, 17, 738-745, IEEE Transactions on Device and Materials Reliability, 2017
  • 87 Bhattacharya, S. and Das, D. and Rahaman, H., Stability Analysis in Top-Contact and Side-Contact Graphene Nanoribbon Interconnects, 63, 588-596, IETE Journal of Research, 2017
  • 88 Maity, I. and Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Tuning of electronic properties of edge oxidized armchair graphene nanoribbon by the variation of oxygen amounts and positions, 28, 9039-9047, Journal of Materials Science: Materials in Electronics, 2017
  • 89 Manodipan Sahoo and Hafizur Rahaman, Modeling and Analysis of Crosstalk Induced Overshoot/Undershoot Effects in Multilayer Graphene Nanoribbon Interconnects and Its Impact on Gate Oxide Reliability, 63, 231-238, Microelectronics Reliability(Elsevier), 2016
  • 90 Sayan Kanungo, Sanatan Chattopadhyay, Partha Sarathi Gupta, Kunal Sinha and Hafizur Rahaman, Study and Analysis of the Effects of SiGe Source and Pocket Doped Channel on Sensing Performance of Dielectrically-Modulated Tunnel FET based Bio-Sensors, 63(6), 2589 - 2596, IEEE Transactions on Electron Devices, 2016
  • 91 Pranab Roy, Swati Saha, and Hafizur Rahaman, Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips, 25(11), 2245-3358, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
  • 92 Sandip Bhattacharya, Debaprasad Das and Hafizur Rahaman, Reduced Thickness Interconnect Model using GNR to Avoid Crosstalk Effects, 15(2), 367–380, Journal of Computational Electronics (JCEL), 2016
  • 93 Soumyajit Poddar, Prasun Ghosal, and Hafizur Rahaman, Design of a High Performance CDMA Based Broadcast Free Photonic Multi Core Netweork on Chip, 15(1), 1-30, ACM Transactions on Embedded Computing Systems, 2016
  • 94 Sayan Kanungo, Sanatan Chattopadhyay, Partha Sarathi Gupta and Hafizur Rahaman, Comparative Performance Analysis of the Dielectrically Modulated Full Gate and Short Gate Tunnel FET based Bio-Sensors, 62(3), 994 - 1001, IEEE Transactions on Electron Devices (TED 2015), 2016
  • 95 Roy, P. and Saha, S. and Rahaman, H., Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips, 24, 3345-3358, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
  • 96 Panigrahi, Asisa Kumar, Satish Bonam, Tamal Ghosh, Shiv Govind Singh, and Siva Rama Krishna Vanjari, Ultra-thin Ti passivation mediated breakthrough in high quality Cu-Cu bonding at low temperature and pressure, Materials Letters, 2016
  • 97 Partha Sarathi Gupta, Hafizur Rahaman, Kunal Sinha, and Sanatan Chattopadhyay, An Optoelectronic Band-to-band Tunnel Transistor for Near-infrared Sensing Applications: Device Physics, Modeling, and Simulation, 120, 084510, Journal of Applied Physics, 2016
  • 98 Ananda Sankar Chakraborty, Sabir Ali Mondal and Hafizur Rahaman, Low Noise and Low Power Switched Biased CSA with Clocked Reset and Minimal PVT Variation for APD Based Positron Emission Tomography, Vol. 88, pp.495–504, Journal of Analog Integrated Circuits and Signal Processing (Springer), 2016
  • 99 L. Banerjee, A Mukhopadhyay, A Sengupta, and H. Rahaman, Performance analysis of uniaxially strained monolayer black phosphorus and blue phosphorus n-MOSFET and p-MOSFET, Vol. 15 (3), pp.919-930, Journal of Computational Electronics (Springer), 2016
  • 100 Soumyajit Poddar, Prasun Ghosal, and Hafizur Rahaman, Design of a High Performance CDMA Based Broadcast Free Photonic Multi Core Network on Chip, Vol. 15(1), Article No.(2), ACM Transactions on Embedded Computing Systems, 2016
  • 101 Pranab Roy, Swati Saha, and Hafizur Rahaman, Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips, Vol.25(11), pp-3345 - 3358, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
  • 102 Arighna Deb, Debesh K. Das, Hafizur Rahaman, Robert Wille, Rolf Drechsler, Bhargab B. Bhattacharya, Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability, Volume 12(4), Article No.:34, ACM Journal on Emerging Technologies in Computing Systems (JETC), 2016
  • 103 Sayan Kanungo, Sanatan Chattopadhyay, Partha Sarathi Gupta, Kunal Sinha and Hafizur Rahaman, Study and Analysis of the Effects of SiGe Source and Pocket Doped Channel on Sensing Performance of Dielectrically-Modulated Tunnel FET based Bio-Sensors, Volume 63(6), pp.2589 - 2596, IEEE Transactions on Electron Devices, 2016
  • 104 Partha Sarathi Gupta, Hafizur Rahaman, Kunal Sinha, and Sanatan Chattopadhyay, An Optoelectronic Band-to-band Tunnel Transistor for Near-infrared Sensing Applications: Device Physics, Modeling, and Simulation, Vol. 120, 084510, Journal of Applied Physics (AIP Publishing), 2016
  • 105 Gupta, P.S. and Rahaman, H. and Sinha, K. and Chattopadhyay, S., An optoelectronic band-to-band tunnel transistor for near-infrared sensing applications: Device physics, modeling, and simulation, 120, Journal of Applied Physics, 2016
  • 106 Bhattacharya, S. and Das, D. and Rahaman, H., Analysis of temperature dependent power supply voltage drop in graphene nanoribbon and Cu based power interconnects, 3, 1493-1506, AIMS Materials Science, 2016
  • 107 Sharma, B. and Mukhopadhyay, A. and Sengupta, A. and Rahaman, H. and Sarkar, C.K., Analysis of tunneling currents in multilayer black phosphorous and MoS non-volatile flash memory cells, 15, 129-137, Journal of Computational Electronics, 2016
  • 108 Poddar, S. and Ghosal, P. and Rahaman, H., Design of a high-performance cdma-based broadcast-free photonic multi-core network on chip, 15, ACM Transactions on Embedded Computing Systems, 2016
  • 109 Adak, S. and Swain, S.K. and Rahaman, H. and Sarkar, C.K., Impact of gate engineering in enhancement mode n++GaN/InAlN/AlN/GaN HEMTs, 100, 306-314, Superlattices and Microstructures, 2016
  • 110 Adak, S. and Swain, S.K. and Dutta, A. and Rahaman, H. and Sarkar, C.K., Influence of channel length and High-K oxide thickness on Subthreshold DC performance of graded channel and gate stack DG-MOSFETs, 11, Nano, 2016
  • 111 Das, D. and Rahaman, H., Investigating the Applicability of Graphene Nanoribbon as Signal and Power Interconnects for Nanometer Designs, 25, Journal of Circuits, Systems and Computers, 2016
  • 112 Sinha, K. and Gupta, P.S. and Chattopadhyay, S. and Rahaman, H., Investigating the performance of SiGe embedded dual source p-FinFET architecture, 98, 37-45, Superlattices and Microstructures, 2016
  • 113 Chakraborty, A.S. and Mondal, S.A. and Rahaman, H., Low noise and low power switched biased CSA with clocked reset and minimal PVT variation for APD based positron emission tomography, 88, 495-504, Analog Integrated Circuits and Signal Processing, 2016
  • 114 Sahoo, M. and Rahaman, H., Modeling and analysis of crosstalk induced overshoot/undershoot effects in multilayer graphene nanoribbon interconnects and its impact on gate oxide reliability, 63, 231-238, Microelectronics Reliability, 2016
  • 115 Roy, S.K. and Giri, C. and Rahaman, H., Optimization of Test Wrapper for TSV Based 3D SOCs, 32, 511-529, Journal of Electronic Testing: Theory and Applications (JETTA), 2016
  • 116 Pranab Roy,Swati Saha,Hafizur Rahaman,Parthasarathi Dasgupta, Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips, 24, 3245 - 3358, IEEE Transactions on Very Large Scale Integration Systems, 2016
  • 117 Banerjee, L. and Mukhopadhyay, A. and Sengupta, A. and Rahaman, H., Performance analysis of uniaxially strained monolayer black phosphorus and blue phosphorus n-MOSFET and p-MOSFET, 15, 919-930, Journal of Computational Electronics, 2016
  • 118 Bhattacharya, S. and Das, D. and Rahaman, H., Reduced thickness interconnect model using GNR to avoid crosstalk effects, 15, 367-380, Journal of Computational Electronics, 2016
  • 119 Deb, A. and Das, D.K. and Rahaman, H. and Wille, R. and Drechsler, R. and Bhattacharya, B.B., Reversible synthesis of symmetric functions with a simple regular structure and easy testability, 12, ACM Journal on Emerging Technologies in Computing Systems, 2016
  • 120 Kanungo, S. and Chattopadhyay, S. and Gupta, P.S. and Sinha, K. and Rahaman, H., Study and Analysis of the Effects of SiGe Source and Pocket-Doped Channel on Sensing Performance of Dielectrically Modulated Tunnel FET-Based Biosensors, 63, 2589-2596, IEEE Transactions on Electron Devices, 2016
  • 121 Bhattacharya, S. and Das, D. and Rahaman, H., Temperature dependent IR-drop analysis in graphene nanoribbon based power interconnect, 8, Journal of Nano- and Electronic Physics, 2016
  • 122 Sandip Bhattacharya, Debaprasad Das and Hafizur Rahaman, Reduced Thickness Interconnect Model using GNR to Avoid Crosstalk Effects, Vol. 15(2), pp..367–380, Journal of Computational Electronics (JCEL) (Springer), 2016
  • 123 Manodipan Sahoo and Hafizur Rahaman, Modeling and Analysis of Crosstalk Induced Overshoot/Undershoot Effects in Multilayer Graphene Nanoribbon Interconnects and Its Impact on Gate Oxide Reliability, Vol. 63, pp.231-238, Microelectronics Reliability (Elsevier), 2016
  • 124 Partha Sarathi Gupta, Sanatan Chattopadhyay, Partha Sarathi Dasgupta and Hafizur Rahaman, A Novel Photo-sensitive Tunneling Transistor For Near-Infrared Sensing Applications: Design, Modeling and Simulation, 62(5), 1516-1523, IEEE Transactions on Electron Devices, (TED 2015), 2015
  • 125 K Ghosh, BN Ray, Design of high-order elliptic filter from a versatile mode generic OTA-C structure, 102, 392-406, International Journal of Electronics, 2015
  • 126 Kamalika Datta, Indranil Sengupta, and Hafizur Rahaman, A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines, 64(4), 1208-1214, IEEE Transactions on Computers, 2015
  • 127 K Ghosh, BN Ray, CCII-Based Nth-Order Mixed Mode Elliptic Filter with Grounded R and C, 24, 1550035, Journal of Circuits, Systems and Computers, 2015
  • 128 Manodipan Sahoo, Prasun Ghosal and, Hafizur Rahaman, Modeling and Analysis of Cross talk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter Based Approach, 14(2), 259 - 274, IEEE Transactions on Nanotechnology, 2015
  • 129 K Ghosh, BN Ray, CCII-based n th-order current-mode filter with grounded R and C, 3, 105-121, International Journal of Electronics Letters, 2015
  • 130 Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, and Bhargab B. Bhattacharya, Automated Washing Schemes for Residue Removal in Digital Microfluidic Biochips to Enhance Reliability, 21(1), 17, ACM Transactions on Design Automation of Electronic Systems, 2015
  • 131 Gupta, P.S. and Chattopadhyay, S. and Dasgupta, P. and Rahaman, H., A novel photosensitive tunneling transistor for near-infrared sensing applications: Design, modeling, and simulation, 62, 1516-1523, IEEE Transactions on Electron Devices, 2015
  • 132 Ghosh, Tamal, K. Krushnamurthy, Asisa Kumar Panigrahi, Asudeb Dutta, Ch Subrahmanyam, Siva Rama Krishna Vanjari, and Shiv Govind Singh, Facile non thermal plasma based desorption of self assembled monolayers for achieving low temperature and low pressure Cu–Cu thermo-compression bonding, RSC Advances, 2015
  • 133 Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, and Bhargab B. Bhattacharya, Automated Washing Schemes for Residue Removal in Digital Microfluidic Biochips to Enhance Reliability, Vol. 21(1), pp. 1-17, ACM Transactions on Design Automation of Electronic Systems, 2015
  • 134 Sayan Kanungo, Sanatan Chattopadhyay, Partha Sarathi Gupta and Hafizur Rahaman, Comparative Performance Analysis of the Dielectrically Modulated Full Gate and Short Gate Tunnel FET based Bio-Sensors, Vol.62(3), pp. 994 - 1001, IEEE Transactions on Electron Devices, 2015
  • 135 Kamalika Datta, Indranil Sengupta, and Hafizur Rahaman, A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines, Vol. 64(4), pp.1208-1214, IEEE Transactions on Computers, 2015
  • 136 A Mukhopadhyay, L Banerjee, A Sengupta, H Rahaman, Effect of stacking order on device performance of bilayer black phosphorene-field-effect transistor, Vol. 118 (22), 224501, Journal of Applied Physics, 2015 (Springer), 2015
  • 137 Partha Sarathi Gupta, Sanatan Chattopadhyay, Partha Sarathi Dasgupta and Hafizur Rahaman, A Novel Photo-sensitive Tunneling Transistor For Near-Infrared Sensing Applications: Design, Modeling and Simulation, Vol.62(5), pp.1516-1523, IEEE Transactions on Electron Devices, 2015
  • 138 Gupta, P.S. and Chattopadhyay, S. and Dasgupta, P. and Rahaman, H., A novel photosensitive tunneling transistor for near-infrared sensing applications: Design, modeling, and simulation, 62, 1516-1523, IEEE Transactions on Electron Devices, 2015
  • 139 Datta, K. and Sengupta, I. and Rahaman, H., A post-synthesis optimization technique for reversible circuits exploiting negative control lines, 64, 1208-1214, IEEE Transactions on Computers, 2015
  • 140 Kanungo, S. and Chattopadhyay, S. and Gupta, P.S. and Rahaman, H., Comparative performance analysis of the dielectrically modulated full- gate and short-gate tunnel FET-based biosensors, 62, 994-1001, IEEE Transactions on Electron Devices, 2015
  • 141 Mukhopadhyay, A. and Banerjee, L. and Sengupta, A. and Rahaman, H., Effect of stacking order on device performance of bilayer black phosphorene-field-effect transistor, 118, Journal of Applied Physics, 2015
  • 142 Chanak, P. and Banerjee, I. and Rahaman, H., Load management scheme for energy holes reduction in wireless sensor networks, 48, 343-357, Computers and Electrical Engineering, 2015
  • 143 Sahoo, M. and Ghosal, P. and Rahaman, H., Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter-Based Approach, 14, 259-274, IEEE Transactions on Nanotechnology, 2015
  • 144 Sahoo, M. and Rahaman, H., Modeling of crosstalk induced effects in copper-based nanointerconnects: An ABCD parameter matrix-based approach, 24, Journal of Circuits, Systems and Computers, 2015
  • 145 Mitra, D. and Ghoshal, S. and Rahaman, H. and Chakrabarty, K. and Bhattacharya, B.B., Offline washing schemes for residue removal in digital microfluidic biochips, 21, ACM Transactions on Design Automation of Electronic Systems, 2015
  • 146 Roy, S.K. and Giri, C. and Rahaman, H., Optimisation of test architecture in threedimensional stacked integrated circuits for partial stack/complete stack using hard system-on-chips, 9, 268-274, IET Computers and Digital Techniques, 2015
  • 147 Mathew, J. and Rahaman, H. and Patra, P. and Pradhan, D., Selected articles from the IEEE ISED 2014 conference, 11, 373-374, Journal of Low Power Electronics, 2015
  • 148 Manodipan Sahoo, Prasun Ghosal and Hafizur Rahaman, Performance Modeling and Analysis of Carbon Nanotube Bundles for Future VLSI Circuit Applications, Vol.13(3), pp.673-688, Journal of Computational Electronics (Springer), 2015
  • 149 Manodipan Sahoo, Prasun Ghosal and Hafizur Rahaman, Performance Modeling and Analysis of Carbon Nanotube Bundles for Future VLSI Circuit Applications, 13(3), 673-688, Journal of Computational Electronics (Springer), 2014
  • 150 Sahoo, M. and Ghosal, P. and Rahaman, H., Performance modeling and analysis of carbon nanotube bundles for future VLSI circuit applications, 13, 673-688, Journal of Computational Electronics, 2014
  • 151 U. Chatterjeea, , , A. Dasa, T. Ghoshc, S.P. Duttaguptaa, M.N. Gandhib, S.G. Singh, Effect of post deposition annealing on thermal evaporated ZnSe:Te towards a scintillator application, Microelectronic Engineering, 2014
  • 152 Kamalika Datta, Gaurav Rathi, Indranil Sengupta and Hafizur Rahaman, An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes, Vol. 11(2), pp. 1-15, ”, ACM Journal on Emerging Technologies in Computing Systems (JETC), 11(2):15(2014), (With PhD Student)., 2014
  • 153 Nachiketa Das, Pranab Roy and Hafizur Rahaman, Detection of Crosstalk Faults in Field Programmable Gate Arrays (FPGA)., 96, 227 -236, Journal of The Institution of Engineers (India): Series B IEI(B) (Springer), 2014
  • 154 Ghosal, P. and Rahaman, H. and Mukherjee, K. and Ballabh, D., A low power, low jitter DLL based low frequency (250 kHz) clock generator, 7, 3-11, International Journal of Signal and Imaging Systems Engineering, 2014
  • 155 Datta, K. and Rathi, G. and Sengupta, I. and Rahaman, H., An improved reversible circuit synthesis approach using clustering of ESOP cubes, 11, ACM Journal on Emerging Technologies in Computing Systems, 2014
  • 156 Banerjee, I. and Chanak, P. and Rahaman, H. and Samanta, T., Effective fault detection and routing scheme for wireless sensor networks, 40, 291-306, Computers and Electrical Engineering, 2014
  • 157 Das, N. and Roy, P. and Rahaman, H., Bridging fault detection in cluster based FPGA by using Muller C element, 39, 2469-2482, Computers and Electrical Engineering, 2013
  • 158 Das, N. and Roy, P. and Rahaman, H., Built-in-self-test technique for diagnosis of delay faults in cluster-based field programmable gate arrays, 7, 210-220, IET Computers and Digital Techniques, 2013
  • 159 Kole, D.K. and Rahaman, H. and Das, D.K. and Bhattacharya, B.B., Derivation of test set for detecting multiple missing-gate faults in reversible circuits, 39, 225-236, Computers and Electrical Engineering, 2013
  • 160 Ghosh, Tamal, Ashudeb Dutta, Shivgovind Singh, Copper Protection by SAM and Low Temperature Bonding for 3Dimentional Integration, Advanced Materials Research, 2013
  • 161 Nachiketa Das, Pranab Roy and Hafizur Rahaman, BIST For Testing And Diagnosis Of Delay Fault in Cluster Based Field Programmable Gate Arrays, 7, 210-222, IET Journal of Computers & Digital Techniques, 2013
  • 162 Nachiketa Das, Pranab Roy and Hafizur Rahaman, Bridging Fault Detection in Cluster Based FPGA by Using Muller-C Element, 39, 225-236, Elsevier Journal of Computer and Electrical Engineering, 2013
  • 163 Debaprasad Das and Hafizur Rahaman, Modeling of Single-Wall Carbon Nanotube Interconnects for Different Process, Temperature, and Voltage Conditions and Investigating Timing Delay, 11(4), 349-363, Journal of Computational Electronics (Springer), 2012
  • 164 Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta, Two-level clustering-based techniques for intelligent droplet routing in digital microfluidic biochips, 45, 316 - 330, Elsevier Integration, 2012
  • 165 Pranab Roy, Hafizur Rahaman and Parthasarthi Das Gupta, Two-level Clustering-based Techniques for Intelligent Droplet Routing in Digital Microfluidic Biochips, Vol.45 (3), pp.316-330, Integration, the VLSI Journal (Elsevier), 2012
  • 166 Debaprasad Das and Hafizur Rahaman, Modeling of Single-Wall Carbon Nanotube Interconnects for Different Process, Temperature, and Voltage Conditions and Investigating Timing Delay, Vol. 11(4), pp. 349-363, Journal of Computational Electronics (Springer), 2012
  • 167 Kasturi Ghosh, Arabinda Roy, Sekhar Mondal, Baidyanath Ray, PARAMETRIC DEVIATION BASED ANALOG TEST AND DIAGNOSIS SYSTEM, 20, 1323-1340, Journal of Circuits, Systems, and Computers, 2011
  • 168 Debaprasad Das and Hafizur Rahaman, Crosstalk Overshoot/undershoot Analysis and its impact on Gate Oxide Reliability in Multi-wall Carbon Nanotube Interconnects, 10(4), 360-372, Journal of Computational Electronics (Springer), 2011
  • 169 Debaprasad Das and Hafizur Rahaman, Analysis of Crosstalk in Single- and Multi-Wall Carbon Nanotube Interconnects and its Impact on Gate Oxide Reliability, 10(6), 1362-1370, IEEE Transactions on Nanotechnology, 2011
  • 170 Debaprasad Das and Hafizur Rahaman, Analysis of Crosstalk in Single- and Multi-Wall Carbon Nanotube Interconnects and its Impact on Gate Oxide Reliability, Vol. 10(6), pp. 1362-1370, IEEE Transactions on Nanotechnology, 2011
  • 171 Debaprasad Das and Hafizur Rahaman, Crosstalk Overshoot/undershoot Analysis and its impact on Gate Oxide Reliability in Multi-wall Carbon Nanotube Interconnects, Vol. 10(4), pp..360-372, Journal of Computational Electronics (Springer), 2011
  • 172 Somsubhra Talapatra, Hafizur Rahaman, and J. Mathew, Low Complexity Digit Serial Systolic Montgomery Multipliers for Special Class of GF(2^m), Vol.18(5), pp.847-852, IEEE Transactions on VLSI Systems, 2010
  • 173 Hafizur Rahaman, Jimson Mathew and Dhiraj K. Pradhan, Test Generation in Systolic Architecture for Multiplication over GF(2^m), Vol. 18(9), pp.1366-1371, IEEE Transactions on VLSI Systems, 2010
  • 174 Hafizur Rahaman, D. K. Das, and B. B. Bhattacharya, An Adaptive BIST Design for Detecting Multiple Stuck-Open Faults in CMOS Complex Cell, Vol. 57(12), pp.2838-2845, IEEE Transactions on Instrumentation and Measurement, 2008
  • 175 Hafizur Rahaman, J. Mathew, A. M. Jabir and D. K. Pradhan, Derivation of Reduced Test Vectors to Test Bit Parallel Multipliers over GF(2^m), Vol.57(9), pp.1289-1294, IEEE Transactions on Computers, 2008
  • 176 Hafizur Rahaman, J. Mathew, A. M. Jabir and D. K. Pradhan, C-Testable Bit Parallel Multipliers over GF(2^m), Vol. 13, No. 1, Article 5, pp.1-16, ACM Transactions on Design Automation of Electronic Systems, 2008
  • 1 M. Parai, K. Ghosh, H. Rahaman, Potentiality of Data Fusion in Analog Circuit Fault Diagnosis, IEEE 29th Asian Test Symposium (Accepted), 2020
  • 2 Pranab Roy,Debajyoti Pal,Tanmoy Biswas,Rupam Bhattacharya,Hafizur Rahaman, Bio-inspired Routing in DMFB: An Artificial Swarm Propagation Based Application, 1 - 11, 11th International Conference on Advances in Information Technology, 2020,ACM International Conference Proceeding Series, 2020
  • 3 Pranab Roy,Amiya Sahoo,Mriganka Chakrabarty,Hafizur Rahaman, Microfluidic Cyberphysical Diagnostic System: An ANN Based Application, 1 - 6, 3rd IEEE International Symposium on Devices,Circuits and Systems,2020,IIEST,Shibpur,India, 2020
  • 4 Pranab Roy, Arko Dutt, Hafizur Rahaman, 3-D IC: An Overview of Technologies, DesignMethodology and Test Strategies, at press, ”,International conference on frontiers in Computing and Systems,2020,Jalpaiguri,WB,India and Advances in Intelligent systems and computing(AISM,Springer), 2020
  • 5 Pampa Howladar, Pranab Roy, Hafizur Rahaman, Micro-electrode-dot array based Biochips : Advantages of Using Different Shaped CMAs, IEEE Computer Society Annual Symposium on VLSI(ISVLSI),North Miami,Florida,USA, 2019
  • 6 Pampa Howladar, Pranab Roy, Subhajit Chatterjee, Hafizur Rahaman, Daisy Chain Based Actuation Techniques for MEDA Based Biochips: A Detailed Analysis, 1- 6, 6th International Conference on Computing, Communication and Sensor Network ,Kolkata., 2018
  • 7 Arindam Sinha Roy, Subrata Das, Pranab Roy, Hafizur Rahaman, An Angular Steiner Tree Based Global Routing Algorithm For Graphene Nanoribbon Circuit, 1 - 6, 22ND VLSI Design and Test Symposium (VDAT-2018), Madurai,India, 2018
  • 8 Arindam Sinharoy, Pranab Roy, Hafizur Rahaman, Computing Fréchet Distance Metric based L-Shape Tile Decomposition for E-Beam Lithography, 313-318, Computing Fréchet Distance Metric based L-Shape Tile Decomposition for E-Beam Lithography, 2018
  • 9 Pranab Roy, Amiya Sahoo,Hafizur Rahaman, Adaptive Medical Detection System: An Iterative Averaging Method for Automated Detection Analysis using DMFBs, 1 - 6, Proc. of 7th IEEE International Symposium on Embedded Computing and Systems Design,Durgapur,India, 2017
  • 10 24. Arindam Sinharoy, Pranab Roy, Hafizur Rahaman, Hausdorff Distance Driven L-shape Matching Based Layout Decomposition for E- Beam Lithography, 711, 287 - 295, 21st VLSI Design and Test Symposium ,Roorkee,Springer CCIS ,, 2017
  • 11 Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman, Parametric fault detection in analog circuits: A statistical approach, 275-280, IEEE 25th Asian Test Symposium (ATS), 2016
  • 12 Arindam Sinharoy, Pranab Roy, Hafizur Rahaman, VLSI Thermal Placement issues:A cooperative game theory based approach, 106-111, 6 th IEEE International Symposium on Embedded Computing and Systems Design,Patna, 2016
  • 13 Pampa Howladar, Pranab Roy, Hafizur Rahaman, An Automated Design of Pin-Constrained Digital Microfluidic Biochip on MEDA Architecture, 1565-1570, IEEE Fourth International Symposium on Women in Computing and Informatics (WCI-ICACCI),Jaipur,India, 2016
  • 14 Arko Dutt, Pranab Roy, Hafizur Rahaman, TSV-Aware 3-D IC Structural Planning with Irregular Die-Size, 713 - 716, IEEE Asia Pacific Conference on Circuits & Systems,Jeju,Korea,, 2016
  • 15 Pranab Roy, Sudeshna Chakraborty, Hafizur Rahaman, Synthesis aware sample preparation techniques using random sample sets in DMFB, 1 - 6, Proc. of 20th IEEE International symposium on VLSI Design and Test,Guwahati,India, 2016
  • 16 Pranab Roy, Khokan Mondal,Mayuri Kundu,Hafizur Rahaman, A New Sample Preparation Technique for Linear Dilution Gradient with Minimal Sample Utilization and Waste Generation in DMFBs, 205-210, Proc, of 2nd IEEE conference on Electrical Information and Communication Technology ,Khulna, Bangladesh, 2015
  • 17 31. Pranab Roy, Mriganka Chakrabarty, Aatreyi Bal, Hafizur Rahaman, Parthasarathi Dasgupta, Decision-based Biochips: A Novel Design for Concurrent Executionof Networked Bioassays integrated in Scalable DMFBs, 138 - 143, Proc, of 6th IEEE ASQED ,Kualalampur, Malaysia, 2015
  • 18 Pranab Roy, Tamosa chakraborty, Hafizur Rahaman,Parthasarathi Dasgupta, Multilevel homogeneous detection analyzer for medical diagnostic application in Digital Microfluidic Biochips, 73 - 78, Proc. of IEEE International symposium of electronic system design,Suratkal, 2014
  • 19 Pranab Roy, Aatreyi Bal, Tamosa Chakraborty, Mriganka Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta,, Optical detection in Biochips: A fuzzy based detection analyzer for homogeneous samples in DMFBs, 551 - 556, Proc. of IEEE CYBER,Hongkong,China, 2014
  • 20 35. Pranab Roy, Samadrita Bhattacharya, Hafizur Rahaman, Parthasarathi Dasgupta, A new technique for layout based customized functional testing of modules in Digital Microfluidic Biochips, 1 - 6, Proc. of IEEE EWDTS,Kiev,Ukraine, 2014
  • 21 Pranab Roy, Aatreyi Bal, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta, Automated two stage detection and analyzer system in Multipartitioned Digital Microfluidic Biochips, 1836 -1840, Proc. of IEEE, ISCAS ,Melbourne, Australia, 2014
  • 22 Indrajit Das, Manodipan Sahoo, Pranab Roy, Hafizur Rahaman, A 45 uW 13 pJ/conv-step 7.4-ENOB 40 kS/s SAR ADC for digital microfluidic biochip applications, 1 - 6, VDAT,2014, 2014
  • 23 Pranab Roy,Hafizur Rahaman,Parthasarathi Dasgupta, A layout based customized testing technique for total microfluidic operations in Digital Microfluidic Biochips, 122-128, Proc. of IEEE,DDECS,Warsaw,Poland, 2014
  • 24 Pranab Roy, Samadrita Bhattacharya,Rupam Bhattacharya,Firdousi Jamil Imam,Hafizur Rahaman,Parthasarathi Dasgupta, A novel wire planning technique for optimum pin utilization in Digital Microfluidic Biochips, 510 -515, Proc. of 27th IEEE International conference of VLSI Design,Mumbai,India, 2014
  • 25 Pranab Roy, ,Aatreyi Bal, Mahua Raha Patra ,Hafizur Rahaman,Parthasarathi Dasgupta, Feedback based automated detection analysis in Digital Microfluidic Biochip Systems, 1 - 6, Proc. of IEEE International Conference on Control, Automation, Robotics and Embedded systems (CARE-2013),Jabalpur, 2013
  • 26 Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta, An intelligent Biochip System for Diagnostic Process Flow based Integration of Combined Detection Analyzer, 108 -112, Proc. of IEEE ISED,Singapore, 2013
  • 27 Pranab Roy, Parthasarathi Gupta, Hafizur Rahaman, Parthasarathi Dasgupta, A new customized testing technique using a novel design of droplet motion detector for digital microfluidic Biochip systems, 897-902, Proc of IEEE ICACCI, Mysore ,India, 2013
  • 28 43. Pranab Roy,Rupam Bhattacharya,Pampa Howladar,Hafizur Rahaman,Parthasarathi Dasgupta, A new cross contamination aware routing method with intelligent path exploration in Digital Microfluidic Biochips, 50 - 55, Proc. Of IEEE DTIS Conference 2013, Abu Dhabi,UAE, 2013
  • 29 Pranab Roy, Samadrita Bhattacharya, Rupam Bhattacharya, Hafizur Rahaman,Parthasarathi Dasgupta, A new method for route based synthesis and placement in Digital Microfluidic Biochips, 361-375, Proc. Of VDAT , Springer CCIS, Jaipur ,India,, 2013
  • 30 Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta, Digital Microfluidic System:A new design for heterogeneous sample based integration of multiple DMFBs, 1905-1909, Proc. of IEEE, ISCAS ,Beijing, China, 2013
  • 31 Pranab Roy, Modud Sohid, Sudipta Chakraborty, A new digital analyzer for optically detected samples in Digital Microfluidic Biochips, 462-465, Proc. Of IEEE MWSCAS, Boise, Idaho, US, 2012
  • 32 47. Pranab Roy, Modud Sohid, Sudipta Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta,, System on Biochips: A new design for integration of multiple DMFBs, 256-260, Proc. Of IEEE ISED,Kolkata ,India, 2012
  • 33 48. Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta, A New design of a dual mode Bioassay detection analyzer for digital microfluidic biochips, 310-313, Proc. Of IEEE CODIS 2012,Jadabpur, Kolkata,India, 2012
  • 34 Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta, “ Novel designs of Digital detection analyzer for intelligent detectionand analysis in digital microfluidic Biochips, 1 - 6, Proc. of IEEE IDT , Doha, Qatar, 2012
  • 35 50. Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta, Automated parallel detection based analyzer System for integrated bioassays in Digital Microfluidic Biochips, 310-315, Proc of IEEE El Nano ,kiev,Ukraine, 2012
  • 36 Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, A New Look Ahead Technique for Customized Testing in Digital Microfluidic Biochips, 25-30, Proc. of IEEE ATS 2012,Nigata,Japan, 2012
  • 37 Pranab Roy, Rupam Bhattacharjee, Modud Sohid, Sudipta Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta, An intelligent compaction technique for pin constrained routing in cross referencing digital microfluidic biochips, 423-432, Proc. of ACM CODES+ISSS 2012,Tempere,Finland, 2012
  • 38 Pranab Roy, Rupam Bhattacharjee, Hafizur Rahaman, Parthasarathi Dasgupta, A New Algorithm for Routing-Aware Net Placement in Cross-Referencing Digital Microfluidic Biochips, 320-325, Proc. of IEEE ISVLSI 2012,Amherst,MS,US, 2012
  • 39 Pranab Roy, Hafizur Rahaman, Parthasarathi dasgupta, Modelling, detection and diagnosis of multiple faults in Cross referencing DMFBs, 1107-1112, International conference on Informatics ,Electronics and Vision,Proc. Of IEEE ICIEV, 2012, Dhaka, Bangladesh, 2012
  • 40 Pranab Roy, Hafizur Rahaman and P.S.Dasgupta, A novel high performance routing technique for Cross-referencing DMFBs, 44-49, Proc. Of IEEE International Conference on Biomedical Engineering (ICOBE 2012,Penang,Malaysia), 2012
  • 41 Pranab Roy, Rupam Bhattacharya, Hafizur Rahaman and Parthasarathi Dasgupta, A Best Path Selection Based Parallel Router For DMFBs, 176-181, Proc. of IEEE International Symposium on Electronic Design ISED 2011,Kochi,India,, 2011
  • 42 Nachiketa Das, Pranab Roy and Hafizur Rahaman, Runtime Congestion and Crosstalk Aware Router for FPGA Using Jbits3.0 for Partial Reconfigurable Application, 146-151, IEEE International Symposium on Electronic Design (ISED 2011), 2011
  • 43 Pranab Roy, Sukanta Roy, Hafizur Rahaman, and Parthasarathi Dasgupta, A Novel Placement algorithm for Multi-pin Digital Microfluidic Biochips, 1 - 6, Proc. of IEEE MWSCAS, 2011
  • 44 Pranab Roy, Hafizur Rahaman, and Parthasarathi Dasgupta, Route Aware Placement Technique for Intelligent Collision Avoidance in Digital Microfluidic Biochips, 85-90, Proc. of IEEE ASQED,Kualalampur,Malaysia, 2011
  • 45 61. Nachiketa. Das,Pranab Roy,Parthasarathi Dasgupta and H. Rahaman, Build-In-Self-Test of FPGA For Diagnosis of Delay Fault, 54-59, IEEE ASQED ,Kualalampur,Malaysia, 2011
  • 46 Pranab Roy, Hafizur Rahaman, and Parthasarathi Dasgupta, A Group-Preferential Parallel-Routing Algorithm for Cross-referencing Digital Microfluidic Biochips, 317-319, Proc. of IEEE/ACM ISVLSI Chennai,India, 2011
  • 47 Pranab Roy, Hafizur Rahaman and Parthasarthi DasGupta, Hierarchical Multi-pin droplet routing in Digital Microfluidic Biochips with Intelligent Collision Avoidance, 229-234, Proc. of ACM Great Lakes Symposium on VLSI 2011 (GLSVLSI 2011),Lausanne ,Switzerland, 2011
  • 48 Nachiketa Das, Pranab Roy, and Hafizur Rahaman, On-Line Detection of Crosstalk Fault in FPGA Using BIST Model,” VLSI Design and Test Symposium, 1 - 6, VDAT,2011, 2011
  • 49 Pranab Roy, Hafizur Rahaman and Parthasarthi DasGupta, A Multipin droplet routing algorithm for Digital Microfluidic Biochips biodevices, 217-223, Proc. of INSTICC Biodevices, 2011 ,Rome,Italy, 2011
  • 50 Pranab Roy, Hafizur Rahaman and Parthasarthi DasGupta, Cluster Based Routing For Multi Pin Droplets In Digital Microfluidic Biochips with Intelligent Collision Avoidance, 1 - 6, Proc. of VLSI Design and Test Symposium(VDAT 2011),Pune,India, 2011
  • 51 Pranab Roy, Hafizur Rahaman and Parthasarthi DasGupta, A Novel Droplet Routing Algorithm for Digital Microfluidic Biochips, 441-446, Proc. of ACM/IEEE GLSVLSI ,Providance,USA, 2010
  • 52 Pranab Roy, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta, “New Techniques for Droplet Routing in Digital Microfluidic Biochips, 1 - 6, Proc. of VLSI Design and Test Symposium (VDAT 2010) ,Chandigarh, India, 2010
  • 53 N. Das, Pranab Roy, and H. Rahaman, On Line Testing of Single Feedback Bridging Fault in Cluster Based FPGA by Using Asynchronous Element, 190-191, proc. of IEEE International On-Line Testing Symposium,Kos,Grecce, 2009
  • 54 73. S. Ghosh, Pranab Roy, S. P. Maity and H. Rahaman, Spread Spectrum Image Watermarking with Digital Design, 2118-2123, IEEE International Advance Computing Conference (IACC’09), Hamirpur , India, 2009
  • 1 Kasturi Ghosh, Hafizur Rahaman, Partha Bhattacharyya, Chemically Functionalized Penta-Graphene for Electronic Device Applications: Journey from Theoretical Prediction to Practical Implementation, in the book ‘Graphene Functionalization Strategies’, Springer Nature Pte. Ltd., Singapore, 2019
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    Prof. Hafizur Rahaman

    Email: hod@vlsi.iiests.ac.in
    rahaman_h@it.iiests.ac.in and hafizur@vlsi.iiests.ac.in
    Phone:  +91 - 33 - 26684561/62/63 Ext. 249, 309