Sudip Ghosh




Courses Undertaken

PG Courses

  • VLSI Testing (VLSI-903)
  • Advanced System Architecture (VLSI-904/1)
  • Synthesis and Verification Techniques (VLSI-1004)
  • SoC and Memory Design and Test (VLSI-1150/2)
  • Digital Signal Processing (VLSI-905/2)

Academic Qualifications

  • Ph.D. (Engineering), Indian Institute of Engineering Science and Technology, Shibpur (IIESTS), 2017.
  • M.S. (VLSI CAD), 2005
  • B.E. (Electronics & Communication Engineering), 2001

Research Statement

Area of work:

  • FPGA and SoC based Digital Watermarking Architectures
  • Logic Synthesis and Verification of Digital circuits
  • VLSI Testing,
  • Advanced Computer Architectures
  • Image and Video signal processing hardware architectures.    

Latest Publications

  • 1 Sudip Ghosh, Yuvam Bhateja, Joshua Roy Palathinkal, Hafizur Rahaman, Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR, vol 41, pp. 867–891, Springer Circuits Systems and Signal Processing (CSSP), 2021
  • 2 Subhajit Das , Sudip Ghosh, Nachiketa Das , Santi P. Maity , Hafizur Rahaman, Reshmi Maity and Niladri Maity, Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach, Volume 37, Issue 4, pp 1575–1593, Springer Circuits Systems and Signal Processing (CSSP), 2018
  • 3 Sambaran Hazra, Sudip Ghosh, Sayandip De and Hafizur Rahaman, FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time, vol 14, pp. 193-221, Springer journal of Real-Time Image Processing (RTIP), 2017
  • 4 Sudip Ghosh,Arijit Biswas, Santi Prasad Maity and Hafizur Rahaman, Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture For Real-Time Applications, Vol. 11, No. 3, pp. 375-386, Journal of Low Power Electronics (JOLPE), 2015
  • 5 Sudip Ghosh, Somsubhra Talapatra, Navonil Chatterjee, Santi P Maity and Hafizur Rahaman, FPGA based Implementation of Embedding and Decoding Architecture for Binary Watermark by Spread Spectrum Scheme in Spatial Domain, Vol. 2, No. 4, pp. 01-08, Bonfring International Journal of Advances in Image Processing, 2012
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    # Patents Year

    Created: 23 November 2019