Laxmidhar Biswal


Designation: Research Scholar
Degree: Ph. D.
Fellowship: INSTITUTE
Enrollment No.: 362013AE4, Date: 18 Jul 2013
Registration No.: PhD/R/2015/0010, Date: 10 Feb 2015Supervisor: Hafizur Rahaman

Academic Qualification

  • Ph.D (Date of Award: 31-07-2020, IIEST Shibpur)
  • M.Tech in VLSI Design (Erstwhile BESU Shibpur (IIEST Shibpur), 2011-2013 )
  • B.Tech in E&TC  (Erstwhile CVRCE Bhubaneswar (C.V Raman Global University, Bhubaneswar), 2003-07)

Research Area

Topic: Fault-tolerant Techniques for Synthesis of Quantum Circuits

Research Area : Quantum Computation, VLSI


Technical Skills : C, Verilog, VHDL.

Experimental Skills : MATLAB, Xilinx ISE, Cadence Virtuoso, ABC tool, CUDD package.

Presently working at : NA

Work Experience :

Teaching Experience : 03 years 7 Months in degree Engineering College ; Industry Experience: NIL

Subject of taught :

  1. Electromagnetic Theory
  2. Microwave Engineering.
  3. Analog Electronics Circuit.
  4. Analog Communication Technique.
  5. Digital Signal Processing.


  1. Ph.D. Institute Fellowship by IIEST Shibpur, (MHRD,, Govt. of India) Feb. 2015 - Jan. 2020.
  2. MHRD GATE Fellowship (2011-13)
  3. Successfully cracked 10 times in GATE (EC).


Google scholar Id: 

Journal :

  1. L. Biswal, D. Bhattacharjee, A. Chattopadhyay, and H. Rahaman, “Techniques for fault-tolerant decomposition of a multicontrolled toffoli gate,” Phys. Rev. A, vol. 100, p. 062326, Dec 2019. DOI: 10.1103/PhysRevA.100.062326 [No. of citation: 04]
  2. L. Biswal, C. Das, R.and Bandyopadhyay, A. Chattopadhyay, and H. Rahaman. “A template-based technique for efficient Clifford+T-based quantum circuit implementation.” Microelectronics Journal, 81, 2018. [No. of citation: 14]
  3. L. Biswal, B. Mondal, and H. Rahaman, “Fault-tolerant Quantum Implementation of Conventional Decoder Logic with Enable Input,” in IET Computers and Digital Techniques.  (under minor revision).


Conference :

  1. L. Biswal, C. Bandyopadhyay, A. Chattopadhyay, R. Wille, R. Drechsler, and H. Rahaman,“Nearest-neighbor and fault-tolerant quantum circuit implementation,” in 2016 IEEE 46th International Symposium on MultipleValued Logic (ISMVL), May 2016, pp. 156–161. Doi: 10.1109/ISMVL.2016.48 [No. of citation: 10]
  2. L. Biswal, C. Bandyopadhyay, R. Wille, R. Drechsler, and H. Rahaman, “Improving the realization of multiple-control toffoli gates using the NCVW quantum gate library,” in 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID), Jan 2016, pp. 573–574.141. doi: 10.1109/VLSID.2016.23.
  3. Biswal L., Bhattacharjee A., Das R., Thirunavukarasu G., Rahaman H. (2019) ”Quantum Domain Design of Clifford+T-Based Bidirectional Barrel Shifter”. In: Rajaram S., Balamurugan N., Gracia Nirmala Rani D., Singh V. (eds) VLSI Design and Test. VDAT 2018. Communications in Computer and Information Science, vol 892. Springer, Singapore. DOI:
  4. L. Biswal, A. Bhattachaijee, S. Ghosh and H. Rahaman, ”Implementation of nearest neighbor quantum circuit with low quantum cost,” 2018 International Symposium on Devices, Circuits and Systems (ISDCS), Howrah, 2018, pp. 1-6. doi: 10.1109/ISDCS.2018.8379674.
  5. L. Biswal, R. Das, A. Bhattacharjee, S. Ghosh and H. Rahaman, ”Clifford+T-based quantum high speed multiplier,” 2018 International Symposium on Devices, Circuits and Systems (ISDCS), Howrah, 2018, pp. 1-7. doi: 10.1109/ISDCS.2018.8379682.
  6. L. Biswal, C. Bandyopadhyay and H. Rahaman, "Efficient Implementation of Fault-Tolerant 4:1 Quantum Multiplexer (QMUX) Using Clifford+T-Group," 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS), Rourkela, India, 2019, pp. 69- 74. doi: 10.1109/iSES47678.2019.00027.
  7. L. Biswal, C. Bandyopadhay and H. Rahaman, "Fault-tolerant Quantum Implementation of 1-bit and 4-bit Comparator Circuit using Clifford+T-group," 2019 9th International Symposium on Embedded Computing and System Design (ISED), Kollam, India, 2019, pp. 1-6. doi: 10.1109/ISED48680.2019.9096247.
  8. Biswal L., Bandyopadhyay C., Rahaman H. (2020), “Clifford+T-based Fault-Tolerant Quantum Implementation of Code Converter Circuit.” In: Pant M., Kumar Sharma T., Arya R., Sahana B., Zolfagharinia H. (eds) Soft Computing: Theories and Applications. Advances in Intelligent Systems and Computing, vol 1154. Springer, Singapore.  DOI:


List of Accepted Conference :

  1. L. Biswal, C. Bandyopadhyay, S. Ghosh and H. Rahaman, “Fault-tolerant Implementation of Quantum Arithmetic and Logical Unit (QALU) using Clifford+T-group,” (in COMSYS 2020, India).
  2. L. Biswal, K. Mondal, A. Bhattachaijee and H. Rahaman, “Fault-tolerant Quantum Implementation of Priority Encoder Circuit using Clifford+T-group,” (in 3rd ISDCS 2020, India).