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Hafizur Rahaman

About


Hafizur Rahaman received his B.E. (Electrical Engineering) from Calcutta University (B. E. College, Shibpur), M.E. (Electrical Engineering) and PhD (Computer Science and Engineering) degrees from the Jadavpur University, Calcutta, India in 1986, 1988 and 2003 respectively.  Dr. Rahaman is full professor of Indian Institute of Engineering Science and Technology (IIEST), Shibpur, India. Prior to joining the IIEST Shibpur, he served as Design Engineer (System) in CMPDI (GoI R & D organization).

Dr. Rahaman visited as Post Doctoral Research Fellow under EPSARC Grant in the Design and Verification Division of Computer Science Department, Bristol University, UK during 2006-2007. During 2008-2009, Dr. Rahaman received Royal Society International Fellowship award to carry out one year advanced research in the Design and Verification Division of Computer Science Department, University of Bristol, United Kingdom. He served as visiting professor at the Computer Architecture Division, University of Germany, under DST-DAAD research fellowship award during 2013-2015.

His research interests include Logic Synthesis, design and testing of Integrated Circuits and nano-biochips, Nanoscale Technologies and Computing viz. Memristors and Reversible Quantum Circuit Synthesis etc.

He leads the VLSI design and test group, Chip-to Systems Program, GoI for fabrication of integrated circuits at IIEST, Shibpur, India,

To his credit, he has supervised 24 doctoral and forty six masters’ theses besides guiding several projects at undergraduate level. Eight more doctoral theses are now in progress.

He is also active in international collaborative research with the Bristol University (UK), University of Bremen (Germany), Duke University (USA), and Hiroshima University (Japan). He has established a strong collaboration with HiSim Laboratory, Hiroshima University since 2015. Currently he is engaged in several collaborative research projects with the different companies and research organizations including ARM, Sankalp Semiconductor.

His research has been funded by DEITY (MCIT, GoI), DST (GoI), CSIR (GoI), DIT (Gov. of WB), AICTE, UGC, Royal Society-UK, DAAD Foundation (Germany) and several industrial partners. He has contributed more than 300 research articles in archival journals and refereed conference proceedings.  He has also contributed towards several book chapters in edited volumes from different publishers including CRC press, and Springer-Verlag Berlin Heidelberg etc. He published a book on emerging technology entitled “Carbon Nanotube and Graphene Nanoribbon Interconnects”, CRC Press (Taylor and Francies Group), USA, December 2014.


Dr. Rahaman is a Member of the VLSI Society of India (VSI), Senior Member of the IEEE, and ACM Sigda. He is regular reviewer of IEEE TCAD, IEEE TVLSI, IEEE TC, and ACM TODAEs.  He has served/is serving as General Chair/Program Chair/Track Chair/TPC member in several conference committees including VLSI Design, VDAT, ATS, ISED, ISVLSI, ASP-DAC, ISPD, ISDCS etc.

He has initiated an IEEE International symposium on Devices, Circuits and systems (ISDCS) in collaboration with Hiroshima University, Japan under the bi-lateral cooperation between India and Japan. This symposium will be held annually in India and in Japan alternatively. This symposium will strengthen the cooperation between the two countries.

Academic Qualifications


  • Post Doctoral [2006-07], University of Bristol, United Kingdom, EPSRC Fellowship, UK 
  • Post Doctoral [2008-2009], University of Bristol, United Kingdom, Royal Society Fellowship, UK 
  • Ph.D.(Engg.) :Computer Science and Engineering, Jadavpur University, Kolkata 
  • M.E. (Electrical Engg.) Jadavpur University, Kolkata 
  • B.E. (Electrical Engg.) B.E.College, Shibpur (Calcutta University) 

 

Research Statement


  • Logic Synthesis
  • Design & Test of VLSI Circuits
  • SOC Testing
  • Design & Testing of Micro fluidic Bio Chip
  • Nanoscale Technologies and Computing viz. Memristors and Reversible Quantum Technology based  Circuit Synthesis etc.
  • CNT/GNR based devices, circuits and interconnects

 

Latest Publications


  • 1 Biswal, L. and Bhattacharjee, A. and Das, R. and Thirunavukarasu, G. and Rahaman, H., Quantum Domain Design of Clifford+T-Based Bidirectional Barrel Shifter, 892, 606-618, Communications in Computer and Information Science, 2019
  • 2 Mukhopadhyay, A. and Maiti, T.K. and Bhattacharya, S. and Iizuka, T. and Kikuchihara, H. and Miura-Mattausch, M. and Rahaman, H. and Yoshitomi, S. and Navarro, D. and Mattausch, H.J., Prevention of highly power-efficient circuits due to short-channel effects in MOSFETs, E102C, 487-494, IEICE Transactions on Electronics, 2019
  • 3 Ghosh, K. and Mahapatra, N.S. and Rahaman, H. and Bhattacharyya, P., Prediction of adsorption probability of oxidizing and reducing species on 2-D hybrid junction of rGO-ZnO from first principle analysis, 18, 119-125, IEEE Transactions on Nanotechnology, 2019
  • 4 Ghosh, S. and Roshan, V. and Dutta, A. and Das, S. and Maiti, T.K. and Miura-Mattausch, M. and Rahaman, H., Optimization of dc-dc power converter design with second generation hisim-hv model, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 5 Chakraborty, A. and Saurabh, V. and Gupta, P.S. and Kumar, R. and Majumdar, S. and Das, S. and Rahaman, H., In-memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC), 66, 24-34, Integration, 2019
  • 6 Bhattacharjee, A. and Bandyopadhyay, C. and Wille, R. and Drechsler, R. and Rahaman, H., Improved look-ahead approaches for nearest neighbor synthesis of 1D quantum circuits, 203-208, Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019, 2019
  • 7 Hazarika, A. and Poddar, S. and Rahaman, H., Hardware Efficient Convolution Processing Unit for Deep Neural Networks, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 8 Mondal, S.A. and Mandal, P. and Rahaman, H., Fast locking, startup-circuit free, low area, 32-phase analog DLL, 66, 60-66, Integration, 2019
  • 9 Chowdhary, A.K. and Srimani, S. and Das, S. and Ghosh, K. and Rahaman, H., Estimation of non-linear effects for capacitive dac in sar adc: An analytical model, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 10 Bardhan, S. and Sahoo, M. and Rahaman, H., Empirical Drain Current Model of Graphene Field-Effect Transistor for Application as a Circuit Simulation Tool, IETE Journal of Research, 2019
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    Research Areas


    • Research Student
    • CNT/GNR based devices, circuits and interconnects
    • Nanoscale Technologies and Computing viz. Memristors and Reversible Quantum Technology based Circuit Synthesis etc.
    • Design & Testing of Micro fluidic Bio Chip
    • SOC Testing
    • Design & Test of VLSI Circuits
    • Logic Synthesis

    Publications


  • 1 Biswal, L. and Bhattacharjee, A. and Das, R. and Thirunavukarasu, G. and Rahaman, H., Quantum Domain Design of Clifford+T-Based Bidirectional Barrel Shifter, 892, 606-618, Communications in Computer and Information Science, 2019
  • 2 Mukhopadhyay, A. and Maiti, T.K. and Bhattacharya, S. and Iizuka, T. and Kikuchihara, H. and Miura-Mattausch, M. and Rahaman, H. and Yoshitomi, S. and Navarro, D. and Mattausch, H.J., Prevention of highly power-efficient circuits due to short-channel effects in MOSFETs, E102C, 487-494, IEICE Transactions on Electronics, 2019
  • 3 Ghosh, K. and Mahapatra, N.S. and Rahaman, H. and Bhattacharyya, P., Prediction of adsorption probability of oxidizing and reducing species on 2-D hybrid junction of rGO-ZnO from first principle analysis, 18, 119-125, IEEE Transactions on Nanotechnology, 2019
  • 4 Chakraborty, A. and Saurabh, V. and Gupta, P.S. and Kumar, R. and Majumdar, S. and Das, S. and Rahaman, H., In-memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC), 66, 24-34, Integration, 2019
  • 5 Mondal, S.A. and Mandal, P. and Rahaman, H., Fast locking, startup-circuit free, low area, 32-phase analog DLL, 66, 60-66, Integration, 2019
  • 6 Bardhan, S. and Sahoo, M. and Rahaman, H., Empirical Drain Current Model of Graphene Field-Effect Transistor for Application as a Circuit Simulation Tool, IETE Journal of Research, 2019
  • 7 Bandyopadhyay, C. and Das, R. and Chattopadhyay, A. and Rahaman, H., Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures, 13, 38-48, IET Computers and Digital Techniques, 2019
  • 8 Das, S. and Bhattacharya, S. and Das, D. and Rahaman, H., Comparative stability analysis of pristine and asf5 intercalation doped top contact graphene nano ribbon interconnects, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 9 Banerjee, L. and Sengupta, A. and Rahaman, H., Carrier Transport and Thermoelectric Properties of Differently Shaped Germanene (Ge) and Silicene (Si) Nanoribbon Interconnects, 66, 664-669, IEEE Transactions on Electron Devices, 2019
  • 10 Mondal, J. and Mondal, B. and Kole, D.K. and Rahaman, H. and Das, D.K., Boolean Difference Technique for Detecting All Missing Gate and Stuck-at Faults in Reversible Circuits, Journal of Circuits, Systems and Computers, 2019
  • 11 Bardhan, S. and Sahoo, M. and Rahaman, H., Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects, 13, 421-427, IET Circuits, Devices and Systems, 2019
  • 12 Mondal, B. and Bandyopadhyay, C. and Bhattacharjee, A. and Rahaman, H., An Online Testing Scheme for Detection of Gate Faults in ESOP-Based Reversible Circuit, Journal of The Institution of Engineers (India): Series B, 2019
  • 13 Sinharay, A. and Das, S. and Roy, P. and Rahaman, H., An Angular Steiner Tree Based Global Routing Algorithm for Graphene Nanoribbon Circuit, 892, 670-681, Communications in Computer and Information Science, 2019
  • 14 Sharma, B. and Mukhopadhyay, A. and Banerjee, L. and Sengupta, A. and Rahaman, H. and Sarkar, C.K., Ab initio study of mono-layer 2-D insulators (X-(OH)2 and h-BN) and their use in MTJ memory device, 25, 1909-1917, Microsystem Technologies, 2019
  • 15 Bhattacharya, R. and Roy, P. and Rahaman, H., A complete routing simulator for digital microfluidic biochip, 10, 70-85, International Journal of Information System Modeling and Design, 2019
  • 16 Bardhan, S. and Sahoo, M. and Rahaman, H., A Surface Potential-Based Model for Dual Gate Bilayer Graphene Field Effect Transistor Including the Capacitive Effects, Journal of Circuits, Systems and Computers, 2019
  • 17 Bhattacharjee, A. and Bandyopadhyay, C. and Biswal, L. and Rahaman, H., A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture, 892, 593-605, Communications in Computer and Information Science, 2019
  • 18 L. Banerjee, A Sengupta, and H. Rahaman, Carrier transport and thermoelectric properties of differently shaped Germanene (Ge) and Silicene (Si) nanoribbon interconnects, 66 (1), 664-669, IEEE Transactions on Electron Devices, 2019
  • 19 Kule, M. and Rahaman, H. and Bhattacharya, B.B., Maximal Defect-Free Component in Nanoscale Crossbar Circuits Amidst Stuck-Open and Stuck-Closed Faults, Journal of Circuits, Systems and Computers, 2018
  • 20 Bhattacharya, S. and Das, D. and Rahaman, H., Analysis of delay fault in GNR power interconnects, 31, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 2018
  • 21 Bhattacharya, S. and Das, D. and Rahaman, H., Analysis of Simultaneous Switching Noise and IR-Drop in Side-Contact Multilayer Graphene Nanoribbon Power Distribution Network, 27, Journal of Circuits, Systems and Computers, 2018
  • 22 Bandyopadhyay, C. and Das, R. and Wille, R. and Drechsler, R. and Rahaman, H., Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams, 71, 19-29, Microelectronics Journal, 2018
  • 23 Maity, I. and Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Spin Dependent Electronic Transport in Edge Oxidized Zigzag Graphene Nanoribbon, 5, 9892-9898, Materials Today: Proceedings, 2018
  • 24 Bandyopadhyay, C. and Parekh, S. and Rahaman, H., Improved circuit synthesis approach for exclusive-sum-of-product-based reversible circuits, 12, 167-175, IET Computers and Digital Techniques, 2018
  • 25 Bhattacharya, R. and Roy, P. and Rahaman, H., Homogeneous droplet routing in DMFB: An enhanced technique for high performance bioassay implementation, 60, 74-91, Integration, the VLSI Journal, 2018
  • 26 Hazra, S. and Ghosh, S. and De, S. and Rahaman, H., FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time, 14, 193-221, Journal of Real-Time Image Processing, 2018
  • 27 Poddar, S. and Wille, R. and Rahaman, H. and Bhattacharya, B.B., Error-Oblivious Sample Preparation with Digital Microfluidic Lab-on-Chip, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018
  • 28 Das, S. and Das, D. and Rahaman, H., Electro-thermal RF modeling and performance analysis of graphene nanoribbon interconnects, 17, 1695-1708, Journal of Computational Electronics, 2018
  • 29 Howladar, P. and Roy, P. and Rahaman, H., Design Automation and Testing of MEDA-Based Digital Microfluidic Biochips: A Brief Survey, IETE Journal of Research, 2018
  • 30 Bhattacharya, S. and Das, S. and Mukhopadhyay, A. and Das, D. and Rahaman, H., Analysis of a temperature-dependent delay optimization model for GNR interconnects using a wire sizing method, 17, 1536-1548, Journal of Computational Electronics, 2018
  • 31 Biswal, L. and Das, R. and Bandyopadhyay, C. and Chattopadhyay, A. and Rahaman, H., A template-based technique for efficient Clifford+T-based quantum circuit implementation, 81, 58-68, Microelectronics Journal, 2018
  • 32 Sudip Poddar, Robert Wille, Hafizur Rahaman and Bhargab B. Bhattacharya, Error-Oblivious Sample Preparation with Digital Microfluidic Lab-on-Chip, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 33 Laxmidhar Biswal,Rakesh Das, Chandan Bandyopadhyay,Anupam Chattopadhyay and Hafizur Rahaman, A Template-based Technique for Efficient Clifford+T-based Quantum Circuit Implementation, 81 (2018), 58-68, Microelectronics Journal (Elsevier), 2018 34 Subhajit Das, Debaprasad Das, and Hafizur Rahaman, Electro-thermal RF Modeling and Performance Analysis of Graphene Nanoribbon Interconnects, Journal of Computational Electronics (Springer), 2018 35 Sandip Bhattacharya,Subhajit Das, Arnab Mukhopadhyay, Debaprasad Das, and Hafizur Rahaman, Analysis of Temperature Dependent Delay Optimization Model for GNR Interconnect Using Wire Sizing Method, Journal of Computational Electronics (Springer), 2018 36 Anindita Chakraborty,Vivek Saurabh,Partha Sarathi Gupta,Rituraj Kumar,Saikat Majumdar,Smriti Das and Hafizur Rahaman, In-Memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC), Integration, the VLSI Journal, (Elsevier), 2018
  • 37 Tiwari, S. and Dolai, S. and Rahaman, H. and Gupta, P.S., Effect of temperature and phonon scattering on the drain current of a MOSFET using SL-MoS as its channel material, 463, 108-117, Journal of Non-Crystalline Solids, 2017
  • 38 Adak, S. and Swain, S.K. and Pardeshi, H. and Rahaman, H. and Sarkar, C.K., Effect of barrier thickness on linearity of underlap AlInN/GaN DG-MOSHEMTs, 12, Nano, 2017
  • 39 Kanungo, S. and Mondal, S.A. and Chattopadhyay, S. and Rahaman, H., Design and Investigation on Bioinverter and Bioring-Oscillator for Dielectrically Modulated Biosensing Applications, 16, 974-981, IEEE Transactions on Nanotechnology, 2017
  • 40 Das, D. and Rahaman, H., Carbon nanotube and graphene nanoribbon interconnects, 1-168, Carbon Nanotube and Graphene Nanoribbon Interconnects, 2017
  • 41 Sahoo, M. and Rahaman, H., Analysis of Crosstalk-Induced Effects in Multilayer Graphene Nanoribbon Interconnects, 26, Journal of Circuits, Systems and Computers, 2017
  • 42 Sinha, K. and Chattopadhyay, S. and Gupta, P.S. and Rahaman, H., A technique to incorporate both tensile and compressive channel stress in Ge FinFET architecture, 16, 620-630, Journal of Computational Electronics, 2017
  • 43 Maity, I. and Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Tuning of electronic properties of edge oxidized armchair graphene nanoribbon by the variation of oxygen amounts and positions, 28, 9039-9047, Journal of Materials Science: Materials in Electronics, 2017
  • 44 Bhattacharya, S. and Das, D. and Rahaman, H., Stability Analysis in Top-Contact and Side-Contact Graphene Nanoribbon Interconnects, 63, 588-596, IETE Journal of Research, 2017
  • 45 Maity, I. and Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Selectivity Tuning of Graphene Oxide Based Reliable Gas Sensor Devices by Tailoring the Oxygen Functional Groups: A DFT Study Based Approach, 17, 738-745, IEEE Transactions on Device and Materials Reliability, 2017
  • 46 Ghosh, K. and Rahaman, H. and Bhattacharyya, P., Potentiality of Density-Functional Theory in Analyzing the Devices Containing Graphene-Crystalline Solid Interfaces: A Review, 64, 4738-4745, IEEE Transactions on Electron Devices, 2017
  • 47 Srimani, S. and Parai, M.K. and Ghosh, K. and Rahaman, H., Parametric fault detection of analog circuits based on Bhattacharyya measure, 93, 477-488, Analog Integrated Circuits and Signal Processing, 2017
  • 48 Chatterjee, S. and Roy, S.K. and Giri, C. and Rahaman, H., Modeling and analysis of transient heat for 3D IC, 711, 365-375, Communications in Computer and Information Science, 2017
  • 49 Bhattacharya, S. and Das, D. and Rahaman, H., Modeling and Performance Analysis of Graphene Nanoribbon Interconnects, 40, 325-329, National Academy Science Letters, 2017
  • 50 Tiwari, S. and Dolai, S. and Rahaman, H. and Gupta, P.S., Effect of temperature and phonon scattering on the drain current of a MOSFET using SL-MoS as its channel material, 111, 912-921, Superlattices and Microstructures, 2017
  • 51 Chaudhuri, N. and Bandyopadhyay, C. and Rahaman, H., Improving the design of nearest neighbor quantum circuits in 2D space, 711, 421-426, Communications in Computer and Information Science, 2017
  • 52 Sinharay, A. and Roy, P. and Rahaman, H., Hausdorff distance driven L-shape matching based layout decomposition for E-beam lithography, 711, 287-295, Communications in Computer and Information Science, 2017
  • 53 Kanungo, S. and Chattopadhyay, S. and Sinha, K. and Gupta, P.S. and Rahaman, H., A Device Simulation-Based Investigation on Dielectrically Modulated Fringing Field-Effect Transistor for Biosensing Applications, 17, 1399-1406, IEEE Sensors Journal, 2017
  • 54 Sayan Kanungo, Sanatan Chattopadhyay, Kunal Sinha, Partha Sarathi Gupta, and Hafizur Rahaman, A Device Simulation-Based Investigation on Dielectrically Modulated Fringing Field-Effect Transistor for Biosensing Applications, 17(5), 1399-1406, IEEE Sensors Journal, 2017
  • 55 Sayan Kanunga, Sabir Ali Mondal, Sanatan Chottopadhyaya and Hafizur Rahaman, Design and Investigation on Bio-Inverter and Bio-Ring-oscillator for Dielectrically Modulated Bio-sensing Applications, 16(6), 974 – 981, IEEE Transactions on Nanotechnology, 2017
  • 56 Supriyo Srimani, Kasturi Ghosh, and Hafizur Rahaman, Parametric Fault Detection of Analog Circuits based on Bhattacharyya Measure, 93(3), 477–488, Analog Integrated Circuits and Signal Processing (Springer), 2017
  • 57 Roy, P. and Saha, S. and Rahaman, H., Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips, 24, 3345-3358, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
  • 58 Bhattacharya, S. and Das, D. and Rahaman, H., Temperature dependent IR-drop analysis in graphene nanoribbon based power interconnect, 8, Journal of Nano- and Electronic Physics, 2016
  • 59 Kanungo, S. and Chattopadhyay, S. and Gupta, P.S. and Sinha, K. and Rahaman, H., Study and Analysis of the Effects of SiGe Source and Pocket-Doped Channel on Sensing Performance of Dielectrically Modulated Tunnel FET-Based Biosensors, 63, 2589-2596, IEEE Transactions on Electron Devices, 2016
  • 60 Deb, A. and Das, D.K. and Rahaman, H. and Wille, R. and Drechsler, R. and Bhattacharya, B.B., Reversible synthesis of symmetric functions with a simple regular structure and easy testability, 12, ACM Journal on Emerging Technologies in Computing Systems, 2016
  • 61 Bhattacharya, S. and Das, D. and Rahaman, H., Reduced thickness interconnect model using GNR to avoid crosstalk effects, 15, 367-380, Journal of Computational Electronics, 2016
  • 62 Banerjee, L. and Mukhopadhyay, A. and Sengupta, A. and Rahaman, H., Performance analysis of uniaxially strained monolayer black phosphorus and blue phosphorus n-MOSFET and p-MOSFET, 15, 919-930, Journal of Computational Electronics, 2016
  • 63 Roy, S.K. and Giri, C. and Rahaman, H., Optimization of Test Wrapper for TSV Based 3D SOCs, 32, 511-529, Journal of Electronic Testing: Theory and Applications (JETTA), 2016
  • 64 Sahoo, M. and Rahaman, H., Modeling and analysis of crosstalk induced overshoot/undershoot effects in multilayer graphene nanoribbon interconnects and its impact on gate oxide reliability, 63, 231-238, Microelectronics Reliability, 2016
  • 65 Chakraborty, A.S. and Mondal, S.A. and Rahaman, H., Low noise and low power switched biased CSA with clocked reset and minimal PVT variation for APD based positron emission tomography, 88, 495-504, Analog Integrated Circuits and Signal Processing, 2016
  • 66 Sinha, K. and Gupta, P.S. and Chattopadhyay, S. and Rahaman, H., Investigating the performance of SiGe embedded dual source p-FinFET architecture, 98, 37-45, Superlattices and Microstructures, 2016
  • 67 Das, D. and Rahaman, H., Investigating the Applicability of Graphene Nanoribbon as Signal and Power Interconnects for Nanometer Designs, 25, Journal of Circuits, Systems and Computers, 2016
  • 68 Adak, S. and Swain, S.K. and Dutta, A. and Rahaman, H. and Sarkar, C.K., Influence of channel length and High-K oxide thickness on Subthreshold DC performance of graded channel and gate stack DG-MOSFETs, 11, Nano, 2016
  • 69 Adak, S. and Swain, S.K. and Rahaman, H. and Sarkar, C.K., Impact of gate engineering in enhancement mode n++GaN/InAlN/AlN/GaN HEMTs, 100, 306-314, Superlattices and Microstructures, 2016
  • 70 Poddar, S. and Ghosal, P. and Rahaman, H., Design of a high-performance cdma-based broadcast-free photonic multi-core network on chip, 15, ACM Transactions on Embedded Computing Systems, 2016
  • 71 Sharma, B. and Mukhopadhyay, A. and Sengupta, A. and Rahaman, H. and Sarkar, C.K., Analysis of tunneling currents in multilayer black phosphorous and MoS non-volatile flash memory cells, 15, 129-137, Journal of Computational Electronics, 2016
  • 72 Bhattacharya, S. and Das, D. and Rahaman, H., Analysis of temperature dependent power supply voltage drop in graphene nanoribbon and Cu based power interconnects, 3, 1493-1506, AIMS Materials Science, 2016
  • 73 Gupta, P.S. and Rahaman, H. and Sinha, K. and Chattopadhyay, S., An optoelectronic band-to-band tunnel transistor for near-infrared sensing applications: Device physics, modeling, and simulation, 120, Journal of Applied Physics, 2016
  • 74 Sayan Kanungo, Sanatan Chattopadhyay, Partha Sarathi Gupta and Hafizur Rahaman, Comparative Performance Analysis of the Dielectrically Modulated Full Gate and Short Gate Tunnel FET based Bio-Sensors, 62(3), 994 - 1001, IEEE Transactions on Electron Devices (TED 2015), 2016
  • 75 Soumyajit Poddar, Prasun Ghosal, and Hafizur Rahaman, Design of a High Performance CDMA Based Broadcast Free Photonic Multi Core Netweork on Chip, 15(1), 1-30, ACM Transactions on Embedded Computing Systems, 2016
  • 76 Sandip Bhattacharya, Debaprasad Das and Hafizur Rahaman, Reduced Thickness Interconnect Model using GNR to Avoid Crosstalk Effects, 15(2), 367–380, Journal of Computational Electronics (JCEL), 2016 77 Pranab Roy, Swati Saha, and Hafizur Rahaman, Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips, 25(11), 2245-3358, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016
  • 78 Sayan Kanungo, Sanatan Chattopadhyay, Partha Sarathi Gupta, Kunal Sinha and Hafizur Rahaman, Study and Analysis of the Effects of SiGe Source and Pocket Doped Channel on Sensing Performance of Dielectrically-Modulated Tunnel FET based Bio-Sensors, 63(6), 2589 - 2596, IEEE Transactions on Electron Devices, 2016
  • 79 Manodipan Sahoo and Hafizur Rahaman, Modeling and Analysis of Crosstalk Induced Overshoot/Undershoot Effects in Multilayer Graphene Nanoribbon Interconnects and Its Impact on Gate Oxide Reliability, 63, 231-238, Microelectronics Reliability(Elsevier), 2016
  • 80 Partha Sarathi Gupta, Hafizur Rahaman, Kunal Sinha, and Sanatan Chattopadhyay, An Optoelectronic Band-to-band Tunnel Transistor for Near-infrared Sensing Applications: Device Physics, Modeling, and Simulation, 120, 084510, Journal of Applied Physics, 2016
  • 81 Gupta, P.S. and Chattopadhyay, S. and Dasgupta, P. and Rahaman, H., A novel photosensitive tunneling transistor for near-infrared sensing applications: Design, modeling, and simulation, 62, 1516-1523, IEEE Transactions on Electron Devices, 2015
  • 82 Mathew, J. and Rahaman, H. and Patra, P. and Pradhan, D., Selected articles from the IEEE ISED 2014 conference, 11, 373-374, Journal of Low Power Electronics, 2015
  • 83 Roy, S.K. and Giri, C. and Rahaman, H., Optimisation of test architecture in threedimensional stacked integrated circuits for partial stack/complete stack using hard system-on-chips, 9, 268-274, IET Computers and Digital Techniques, 2015
  • 84 Mitra, D. and Ghoshal, S. and Rahaman, H. and Chakrabarty, K. and Bhattacharya, B.B., Offline washing schemes for residue removal in digital microfluidic biochips, 21, ACM Transactions on Design Automation of Electronic Systems, 2015
  • 85 Sahoo, M. and Rahaman, H., Modeling of crosstalk induced effects in copper-based nanointerconnects: An ABCD parameter matrix-based approach, 24, Journal of Circuits, Systems and Computers, 2015
  • 86 Sahoo, M. and Ghosal, P. and Rahaman, H., Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter-Based Approach, 14, 259-274, IEEE Transactions on Nanotechnology, 2015
  • 87 Chanak, P. and Banerjee, I. and Rahaman, H., Load management scheme for energy holes reduction in wireless sensor networks, 48, 343-357, Computers and Electrical Engineering, 2015
  • 88 Mukhopadhyay, A. and Banerjee, L. and Sengupta, A. and Rahaman, H., Effect of stacking order on device performance of bilayer black phosphorene-field-effect transistor, 118, Journal of Applied Physics, 2015
  • 89 Kanungo, S. and Chattopadhyay, S. and Gupta, P.S. and Rahaman, H., Comparative performance analysis of the dielectrically modulated full- gate and short-gate tunnel FET-based biosensors, 62, 994-1001, IEEE Transactions on Electron Devices, 2015
  • 90 Datta, K. and Sengupta, I. and Rahaman, H., A post-synthesis optimization technique for reversible circuits exploiting negative control lines, 64, 1208-1214, IEEE Transactions on Computers, 2015
  • 91 Gupta, P.S. and Chattopadhyay, S. and Dasgupta, P. and Rahaman, H., A novel photosensitive tunneling transistor for near-infrared sensing applications: Design, modeling, and simulation, 62, 1516-1523, IEEE Transactions on Electron Devices, 2015
  • 92 Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, and Bhargab B. Bhattacharya, Automated Washing Schemes for Residue Removal in Digital Microfluidic Biochips to Enhance Reliability, 21(1), 17, ACM Transactions on Design Automation of Electronic Systems, 2015
  • 93 Manodipan Sahoo, Prasun Ghosal and, Hafizur Rahaman, Modeling and Analysis of Cross talk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects: An ABCD Parameter Based Approach, 14(2), 259 - 274, IEEE Transactions on Nanotechnology, 2015
  • 94 Kamalika Datta, Indranil Sengupta, and Hafizur Rahaman, A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines, 64(4), 1208-1214, IEEE Transactions on Computers, 2015
  • 95 Partha Sarathi Gupta, Sanatan Chattopadhyay, Partha Sarathi Dasgupta and Hafizur Rahaman, A Novel Photo-sensitive Tunneling Transistor For Near-Infrared Sensing Applications: Design, Modeling and Simulation, 62(5), 1516-1523, IEEE Transactions on Electron Devices, (TED 2015), 2015
  • 96 Sahoo, M. and Ghosal, P. and Rahaman, H., Performance modeling and analysis of carbon nanotube bundles for future VLSI circuit applications, 13, 673-688, Journal of Computational Electronics, 2014
  • 97 Banerjee, I. and Chanak, P. and Rahaman, H. and Samanta, T., Effective fault detection and routing scheme for wireless sensor networks, 40, 291-306, Computers and Electrical Engineering, 2014
  • 98 Datta, K. and Rathi, G. and Sengupta, I. and Rahaman, H., An improved reversible circuit synthesis approach using clustering of ESOP cubes, 11, ACM Journal on Emerging Technologies in Computing Systems, 2014
  • 99 Ghosal, P. and Rahaman, H. and Mukherjee, K. and Ballabh, D., A low power, low jitter DLL based low frequency (250 kHz) clock generator, 7, 3-11, International Journal of Signal and Imaging Systems Engineering, 2014
  • 100 Manodipan Sahoo, Prasun Ghosal and Hafizur Rahaman, Performance Modeling and Analysis of Carbon Nanotube Bundles for Future VLSI Circuit Applications, 13(3), 673-688, Journal of Computational Electronics (Springer), 2014
  • 101 Kole, D.K. and Rahaman, H. and Das, D.K. and Bhattacharya, B.B., Derivation of test set for detecting multiple missing-gate faults in reversible circuits, 39, 225-236, Computers and Electrical Engineering, 2013
  • 102 Das, N. and Roy, P. and Rahaman, H., Built-in-self-test technique for diagnosis of delay faults in cluster-based field programmable gate arrays, 7, 210-220, IET Computers and Digital Techniques, 2013
  • 103 Das, N. and Roy, P. and Rahaman, H., Bridging fault detection in cluster based FPGA by using Muller C element, 39, 2469-2482, Computers and Electrical Engineering, 2013
  • 104 Roy, P. and Bhattacharya, S. and Rahaman, H. and Dasgupta, P., A New Method for Route Based Synthesis and Placement in Digital Microfluidic Biochips, 382 CCIS, 361-375, Communications in Computer and Information Science, 2013
  • 105 Debaprasad Das and Hafizur Rahaman, Modeling of Single-Wall Carbon Nanotube Interconnects for Different Process, Temperature, and Voltage Conditions and Investigating Timing Delay, 11(4), 349-363, Journal of Computational Electronics (Springer), 2012
  • 106 Debaprasad Das and Hafizur Rahaman, Analysis of Crosstalk in Single- and Multi-Wall Carbon Nanotube Interconnects and its Impact on Gate Oxide Reliability, 10(6), 1362-1370, IEEE Transactions on Nanotechnology, 2011
  • 107 Debaprasad Das and Hafizur Rahaman, Crosstalk Overshoot/undershoot Analysis and its impact on Gate Oxide Reliability in Multi-wall Carbon Nanotube Interconnects, 10(4), 360-372, Journal of Computational Electronics (Springer), 2011
  • 1 Ghosh, S. and Roshan, V. and Dutta, A. and Das, S. and Maiti, T.K. and Miura-Mattausch, M. and Rahaman, H., Optimization of dc-dc power converter design with second generation hisim-hv model, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 2 Bhattacharjee, A. and Bandyopadhyay, C. and Wille, R. and Drechsler, R. and Rahaman, H., Improved look-ahead approaches for nearest neighbor synthesis of 1D quantum circuits, 203-208, Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019, 2019
  • 3 Hazarika, A. and Poddar, S. and Rahaman, H., Hardware Efficient Convolution Processing Unit for Deep Neural Networks, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 4 Chowdhary, A.K. and Srimani, S. and Das, S. and Ghosh, K. and Rahaman, H., Estimation of non-linear effects for capacitive dac in sar adc: An analytical model, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • 5 Bhattacharya, R. and Roy, P. and Rahaman, H., A new homogeneous droplet transportation algorithm and its simulator to boost route performance in digital microfluidic biochips, 755, 429-440, Advances in Intelligent Systems and Computing, 2019
  • 6 Bhattacharya, R. and Roy, P. and hafizur Rahaman, A new combined routing technique in digital microfluidic biochip, 755, 441-450, Advances in Intelligent Systems and Computing, 2019
  • 7 Bhar, S. and Mondal, A. and Srimani, S. and Hatai, I. and Das, S. and Ghosh, K. and Rahaman, H., A low power driver amplifier for Fully Differential ADC, 2019 2nd International Symposium on Devices, Circuits and Systems, ISDCS 2019 - Proceedings, 2019
  • Patents


    # Patents Year

    Research Groups


    Anirban Bhattacharjee
    Ph. D
    anirbanbhattacharjee330@gmail.com

    Rakesh Das
    Ph. D
    7059070278
    rakesh.rs2017@it.iiests.ac.in / rakesh.0689@gmail.com

    Research:
    Optical Computing

    Partha Sarathi Gupta
    Ph. D.
    gupta_parthasarathi@yahoo.co.in

    Research:
    Tunnel Field Effect Transistors for Optoelectronic Applications

    Citations


    Google Scholar
    CITATION H-INDEX I-10 INDEX
    2308 20 79

    Created: 23 November 2019