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Supriyo Srimani

About


Designation: Research Scholar
Degree: Ph. D.
Fellowship: Visvesvaraya PhD Fellowship
Enrollment No.: 362016BE1, Date: 04 Jan 2016
Registration No.: PhD/R/2017/0036, Date: 06 Apr 2017Supervisor: Hafizur Rahaman

Academic Qualification

  • Doctor of Philosophy (Ph.D.), School of VLSI Technology: January 2016 - Present
  • Master of Technology (M.Tech) in VLSI Design, Institute of Radio Physics & Electronics. July 2013 - June 2015
  • Bachelor of Technology (B.Tech), Electronics & Communication Engineering. July 2009 - June 2013

 


Research Area


Topic: Fault detection in Analog and Mixed Signal circuits using statistical and machine learning models

Design of AMS Circuits and Testing.


Skills


Technical Skills

Language & Software C, Python (Basic), VHDL, MATLAB, Cadence (Layout and Schematic), Mentor Graphics (Calibre)

Experimental Skills Hands-on experience with Power supplies, MSO & Probes, PRBS Generator, Spectrum Analyzer, and Logic Analyzer.


Awards


  • Work on "Wavelet Transform based fault diagnosis in analog circuits with SVM classifier" is selected as Honorable mention paper in ITC India, 2020 and also selected for the invited paper category in ITC USA, 2020.
  • Achieved Visvesvaraya Fellowship for Ph.D. Research Programme at Indian Institute of Engineering Science & Technology, Shibpur, Howrah, West Bengal, India.
  • Bronze Medalist in the specialization of VLSI Design at Calcutta University, Kolkata, India during Masters Program (M.Tech) at the institute from 2013-2015.
  • Achieved AICTE Fellowship for M.Tech Programme at Calcutta University, Kolkata, India.
  • Qualified GATE in 2013.
  • Achieved Fellowship for B.Tech Programme by Government of West Bengal for being in the top 50 students in Higher Secondary Examination.
  • Achieved RATNA AWARD for completion of the painting (7th year).

Publications


Journal

  • S. Srimani, M. K. Parai, K. Ghosh, and H. Rahaman, "Parametric fault detection of analog circuits based on Bhattacharyya measure," Analog Integrated Circuits and Signal Processing, vol. 93, no. 3, pp. 477-488, 2017. DOI: 10.1007/s10470-017-1052-x
  •  M. K. Parai, S. Srimani, K. Ghosh, and H. Rahaman, "Analog Circuit Fault Detection by Impulse Response-Based Signature Analysis," Circuits, Systems, and Signal Processing, 39, 4281–4296 (2020). https://doi.org/10.1007/s00034-020-01375-0
  •  S. Srimani, M. K. Parai, K. Ghosh, and H. Rahaman, "A Statistical Approach of Analog Circuit Fault Detection Utilizing Kolmogorov--Smirnov Test Method," Circuits, Systems, and Signal Processing, pp. 1-23, 2020. https://doi.org/10.1007/s00034-020-01572-x

 

Conference

  • S. Srimani, K. Ghosh and H. Rahaman, "Wavelet Transform based fault diagnosis in analog circuits with SVM classifier," 2020 IEEE International Test Conference India, Bangalore, India, 2020, pp. 1-10, doi: 10.1109/ITCIndia49857.2020.9171798.
  • S. Jaiswal, A. Mondal, S. Srimani, I. Hatai, S,Das, K. Ghosh and H. Rahaman " Design of a low power, high speed self calibrated dynamic latched comparator," 2020 3td International Symposium on Devices, Circuits and Systems (ISDCS), Kolkata, India, 2020 (accepted for publication).
  • S. Srimani, R. Singh, M. K. Parai, K. Ghosh and H. Rahaman, "Distortion Analysis Using Volterra Kernel for Amplifier Circuits," 2019 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS), Rourkela, India, 2019, pp. 308-311, doi: 10.1109/iSES47678.2019.00076.
  • A. Mondal, S. Bhar, S. Srimani, I. Hatai, K. Ghosh and H. Rahaman, "Analytical Model of a Multi-Resolution Sample rate re-configurable Decimator for SDADC," 2019 IEEE Region 10 Symposium (TENSYMP), Kolkata, India, 2019, pp. 588-592, doi: 10.1109/TENSYMP46218.2019.8971138.
  • S. Bhar, A. Mondal, S. Srimani, I. Hatai, S. Das, K. Ghosh and H. Rahaman "A low power driver amplifier for Fully Differential ADC ," 2019 International Symposium on Devices, Circuits and Systems (ISDCS), Hiroshima, Japan, 2019.
  • A. Chowdhary, S. Srimani, S. Das, K. Ghosh and H. Rahaman , "Estimation of non-linear effects for Capacitive DAC in SAR ADC : An Analytical Model ," 2019 International Symposium on Devices, Circuits and Systems (ISDCS), Hiroshima, Japan, 2019.
  • S. Srimani, K. Ghosh and H. Rahaman "Soft fault detection in analog circuits from probability density function," 2018 International Symposium on Devices, Circuits and Systems (ISDCS), Howrah, 2018, pp. 1-5.doi: 10.1109/ISDCS.2018.8379676.
  • S. Srimani, M. K. Parai, K. Ghosh, and H. Rahaman, " Volterra Kernel based Distortion analysis in Amplifier Circuits,” 18th IEEE Workshop on RTL and High Level Testing (WRTLT) 2017, Taipei, Taiwan, Nov 2017.
  • S. Srimani, K. Ghosh and H. Rahaman, "Parametric Fault Detection in Analog Circuits: A Statistical Approach," 2016 IEEE 25th Asian Test Symposium (ATS), Hiroshima, 2016, pp. 275-280.