| # | List of Publication by Dr. Ananda Sankar Chakraborty |
|---|---|
| 1 | Ananda Sankar Chakraborty, Ali M Niknejad, A Comprehensive High-to-Low Delay Model for NCFET Circuits, IEEE TCAS-II, 2026 |
| 2 | Gisha Chittattukara Girijan , Ananda Sankar Chakraborty , Rajat Subhra Chakraborty , Bijoy Antony Jose and Jimson Mathew, Challenges in Modelling Analog PUFs: A Study of Hybrid and Diode Triode Current Mirror Inverter PUF Under Machine Learning Attacks, IET Circuits, Devices & Systems, 2025 |
| 3 | Ananda Sankar Chakraborty, Efficient Long-Channel MOSFET Model with SPICE-enabled Lambert W Function for Universal Application, (Accepted for publication), Silicon (Springer Nature), 2025 |
| 4 | Gisha C G, Ananda Sankar Chakraborty, Rajat Subhra Chakraborty, Bijoy A Jose, Jimson Mathew, A Novel Physical Unclonable Function Based on Hybrid Current Mirror, 1-13, Journal of Hardware and Systems Security, Springer, 2023 |
| 5 | AS Chakraborty, S Jandhyala, S Mahapatra, Analytical Surface Potential Solution for Low Effective Mass Channel Common Double Gate MOSFET, TechConnect Briefs, 2018 |
| 6 | AS Chakraborty, S Mahapatra, Compact model for low effective mass channel common double-gate MOSFET, IEEE Transactions on Electron Devices, 2018 |
| 7 | AS Chakraborty, S Mahapatra, Surface potential equation for low effective mass channel common double-gate MOSFET, IEEE Transactions on Electron Devices, 2017 |
| 8 | AS Chakraborty, SA Mondal, H Rahaman, Low noise and low power switched biased CSA with clocked reset and minimal PVT variation for APD based positron emission tomography, Analog Integrated Circuits and Signal Processing (Springer), 2016 |
| 9 | M Chanda, AS Chakraborty, CK Sarkar, Complete delay modeling of sub-threshold CMOS logic gates for low-power application, IJNM, Wiley, 2016 |
Created: 23 November 2019