| # | List of Publication by Prof. Ayan Banerjee |
|---|---|
| 1 | Anirban Ganguly, Debanjana Datta, Mitra, Mousumi Bhanja, Anirban Chakraborty, Ayan Banerjee, A Switched Current Mirror based VLSI Architecture of 1-D DCT for Compressed ECG Signal Acquisition, 1-5, 2024 IEEE Calcutta Conference (CALCON), 2025 |
| 2 | Moitreya Chaudhury, Binit Kumar Pandit, Ayan Banerjee, A Dynamic Window Size-Based VLSI Architecture Design of Moving Average Filter and Its Vulnerability to Hardware Trojans, 1-6, 2024 28th International Symposium on VLSI Design and Test (VDAT), 2024 |
| 3 | Rebanta Dey, Binit Kumar Pandit, Anirban Ganguly, Anirban Chakraborty, Ayan Banerjee, Deep Neural Network Based Multi-Object Detection for Real-time Aerial Surveillance, 1, 1-6, 2023 11th International Symposium on Electronic Systems Devices and Computing (ESDC), 2023 |
| 4 | Akash Ther, Binit Kumar Pandit, Ayan Banerjee, VLSI Architecture of Generalized Pooling for Hardware Acceleration of Convolutional Neural Networks, 1, 1-5, 2023 11th International Symposium on Electronic Systems Devices and Computing (ESDC), 2023 |
| 5 | Akash Ther, Binit Kumar Pandit, Anirban Ganguly, Anirban Chakraborty, Ayan Banerjee, Resource-efficient VLSI Architecture of Softmax Activation Function for Real-time Inference in Deep Learning Applications, 1, 01-05, 2023 International Symposium on Devices, Circuits and Systems (ISDCS), 2023 |
| 6 | Deepak Kumar, Anirban Ganguly, Puja Chakraborty, Anirban Chakraborty, Binit Kumar Pandit, Ayan Banerjee, Low power and high precision analog VLSI design of 1-D DCT for real-time application, 1-5, 2022 IEEE Region 10 Symposium (TENSYMP), 2022 |
| 7 | Sampad Chowdhury, Binit Kumar Pandit, Ayan Banerjee, Computation-Efficient and Multiplierless Hardware Realization of Decimation in Time FFT, 1-6, 2022 IEEE Region 10 Symposium (TENSYMP), 2022 |
| 8 | Binit Kumar Pandit, Ayan Banerjee, VLSI architecture of sigmoid activation function for rapid prototyping of machine learning applications, 117-122, 2021 IEEE International Symposium on Smart Electronic Systems (iSES), 2021 |
| 9 | Sayantan Dutta and Ayan Banerjee, Optimal Image Fusion Algorithm using Modified Whale Optimization Algorithm Amalgamed with Local Search and BAT Algorithm, 709-715, 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC), 2020 |
| 10 | Sayantan Dutta and Ayan Banerjee, Optimal Image Fusion Algorithm using Modified Grey Wolf Optimization amalgamed with Cuckoo Search, Levy Fly and Mantegna Algorithm, 284-290, 2020 2nd International Conference on Innovative Mechanisms for Industry Applications (ICIMIA), 2020 |
| 11 | Sayantan Dutta and Ayan Banerjee, Low Latency and Area Efficient VLSI Architecture of 2D Bilinear Interpolation using Brent Kung Adder Based Fast Multiplier., 273-278, 2020 Fourth International Conference on Inventive Systems and Control (ICISC), 2020 |
| 12 | Sayantan Dutta and Ayan Banerjee, Low Latency and Area Efficient Very Large Scale Integration Architecture of 2-Dimensional Bicubic Interpolation using Carry Save Adder Based Fast Multiplier, 686-692, 2020 Fourth International Conference on Inventive Systems and Control (ICISC), 2020 |
| 13 | Anirban Ganguly, Ayan Banerjee, VLSI design of analog DFT processor for demodulation of QAM-OFDM signal, 1-5, 2019 IEEE 5th International Conference for Convergence in Technology (I2CT), 2019 |
| 14 | Anirban Chakraborty and Ayan Banerjee, Low Latency Semi-iterative CORDIC Algorithm using Normalized Angle Recoding and its VLSI Implementation, 2019 International Conference on Communication and Signal Processing (ICCSP), Chennai, 2019 |
| 15 | Debanjana Datta, Baidyanath Ray and Ayan Banerjee, Synthesis of Linear and Non-linear Analog Circuits, IEEE International System-On-Chip Conference (SOCC 2019 – PhD Forum) Singapore., 2019 |
| 16 | Debanjana Datta, Mousumi Bhanja, A. Chaudhuri, Baidyanath Ray and Ayan Banerjee, Cell-based Coherent Design Methodology for Linear and Non-linear Analog Circuits, IEEE International System-On-Chip Conference (SOCC 2019), September 3-6, 2019, 2019 |
| 17 | Debanjana Dutta, S. Agarwal, V. Kumar, M. Raj, Baidyanath Ray and Ayan Banerjee, Design of Current Mode Sigmoid Function and Hyperbolic Tangent Function, 23rd International Symposium on VLSI Design and Test (VDAT-2019), 2019 |
| 18 | Debanjana Dutta, Mousumi Bhanja, A. Prasad, Baidyanath Ray and Ayan Banerjee, Design of Current-mode High Frequency linear Analog Circuit, IEEE TENSYMP: The IEEE Region 10 Symposium, 2019 |
| 19 | Debanjana Datta, A. Chaudhuri, Mousumi Bhanja, Baidyanath Ray and Ayan Banerjee, Series Realization of Non-Linear Analog Functions using Current Mode Device, 4th IEEE International Conference on Information Systems and Computer Networks (ISCON 2019), 2019 |
| 20 | Anirban Ganguly and Ayan Banerjee, Analog VLSI Design of Current Mode DCT for 1D Signal Processing, 4th IEEE International Conference on Information Systems and Computer Networks (ISCON 2019), 2019 |
| 21 | Anirban Chakraborty and Ayan Banerjee, An Adaptive and Automated Image Fusion Algorithm Based on DWT for Real Time Applications, 4th IEEE International Conference on Information Systems and Computer Networks (ISCON 2019), 2019 |
| 22 | Anirban Ganguly, Anirban Chakraborty and Ayan Banerjee, A Highly Accurate Current Mode Analog Implementation of Radix-2 FFT/IFFT Processor, 8th International Symposium on Embedded Computing and System Design (ISED), 2018 |
| 23 | Anirban Chakraborty and Ayan Banerjee, Area Efficient Hardware Realisation of QR Decomposition Based 2D Wiener Filter For Audio and Image Signal Denoising With High Accuracy, 4th IEEE International Conference on Computing Communication and Automation (ICCCA), 2018 |
| 24 | Anirban Chakraborty and Ayan Banerjee, Low Area and Memory Efficient VLSI Architecture of 1D/ 2D DWT For Real Time Image Decomposition, 8th IEEE International Symposium on Embedded Computing and System Design (ISED), 2018 |
| 25 | Mousumi Bhanja, Anirban Ganguly, Debanjana Dutta, Baidyanath Ray and Ayan Banerjee, Reconfigurable Analog Filter Design using Current Mode Device, 1-6, 14th IEEE India Council International Conference (INDICON), Roorkee, 2017 |
| 26 | Debolina Chakraborty, Anirban Chakraborty, Milan Kumar Tarafder, Ayan Banerjee and Sekhar Ranjan Bhadra Chaudhuri, An Efficient Spectral Domain Approach of Periodic Noise Suppression in Digital Images using Gaussian Filtering Profile, International Conference on Current Trends in Computer, Electrical, Electronics and Communication (ICCTCEEC), 2017 |
| 27 | Anirban Chakraborty, Debolina Chakraborty and Ayan Banerjee, A Memory Efficient, High Throughput and Fastest 1D/3D VLSI Architecture for Reconfigurable 9/7 and 5/3 DWT Filters, International Conference on Current Trends in Computer, Electrical, Electronics and Communication (ICCTCEEC’17), IEEE, 2017 |
| 28 | Anirban Chakraborty, Debolina Chakraborty and Ayan Banerjee, A Multiplier less VLSI Architecture of Modified Lifting Based 1D/2D DWT using Speculative Adder, 6th IEEE International Conference on Communication and Signal Processing (ICCSP’17), 2017 |
| 29 | Ayan Banerjee and Anindya Sundar Dhar, High Throughput VLSI Architecture for CORDIC Based Pipelined FFT Processor, in Proc. International Joint Conference on Information and Communication Technology,2010 at Bhubaneswar, India, 9-10th, 2010 |
| 30 | S.P.Maity, P.K.Nandi, Ayan Banerjee and Malay K. Kundu, Low Cost Data Authentication Scheme And Hardware Design, 574-578, Eleventh National Conference on Communication NCC-2005, 2005 |
| 31 | S.P.Maity, Ayan Banerjee and Malay K. Kundu, An Image-in-image communication scheme and VLSI implementation using FPGA, 6-11, IEEE India Annual Conference 2004, Presented and published, 2004 |
Created: 23 November 2019